74F112SC_Q Fairchild Semiconductor, 74F112SC_Q Datasheet - Page 4

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74F112SC_Q

Manufacturer Part Number
74F112SC_Q
Description
Flip Flops Dual J-K Flip-Flop
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74F112SC_Q

Number Of Circuits
2
Logic Family
74F
Logic Type
D-Type Flip-Flop
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SOIC-16
Minimum Operating Temperature
0 C
www.fairchildsemi.com
f
t
t
t
t
t
t
t
t
t
t
t
t
MAX
PLH
PHL
PLH
PHL
S
S
H
H
W
W
W
REC
AC Electrical Characteristics
AC Operating Requirements
Symbol
Symbol
(H)
(L)
(H)
(L)
(H)
(L)
(L)
Maximum Clock Frequency
Propagation Delay
CP
Propagation Delay
C
Setup Time, HIGH or LOW
J
Hold Time, HIGH or LOW
J
CP Pulse Width
HIGH or LOW
Pulse Width, LOW
C
Recovery Time
S
n
n
Dn
Dn
Dn
or K
or K
n
, S
, C
to Q
or S
Dn
Dn
n
n
to CP
to CP
Dn
n
to Q
to CP
or Q
n
n
n
, Q
n
n
Parameter
Parameter
4
Min
2.0
2.0
2.0
2.0
85
V
T
C
CC
A
L
Min
Typ
105
4.0
3.0
4.5
4.5
4.5
4.0
5.0
5.0
4.5
4.5
0
0
50 pF
V
25 C
T
5.0V
CC
A
25 C
5.0V
Max
Max
6.5
6.5
6.5
6.5
T
T
Min
Min
5.0
3.5
5.0
5.0
5.0
5.0
2.0
2.0
2.0
2.0
A
A
80
0
0
V
V
C
CC
CC
0 C to 70 C
0 C to 70 C
L
50 pF
5.0V
5.0V
Max
Max
7.5
7.5
7.5
7.5
Units
Units
MHz
ns
ns
ns
ns
ns
ns

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