ISL6146AFRZ-T7A

Manufacturer Part NumberISL6146AFRZ-T7A
DescriptionHot Swap & Power Distribution LW VOLT ORING FET CONTRLR 3X3 8LD DFN
ManufacturerIntersil
ISL6146AFRZ-T7A datasheet
 

Specifications of ISL6146AFRZ-T7A

Product CategoryHot Swap & Power DistributionRohsyes
ProductControllers & SwitchesCurrent Limit6 A
Supply Voltage - Max20 VSupply Voltage - Min1 V
Operating Temperature Range- 40 C to + 125 CMounting StyleSMD/SMT
Package / CaseDFN-8Input / Supply Voltage (max)20 V
Input / Supply Voltage (min)1 VNumber Of Channels1
Supply Current25 uA  
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Low Voltage OR-ing FET Controller
ISL6146
The ISL6146 represents a family of OR-ing MOSFET controllers
capable of OR-ing voltages from 1V to 18V. Together with suitably
sized N-channel power MOSFETs, the ISL6146 increases power
distribution efficiency when replacing a power OR-ing diode in high
current applications. It provides gate drive voltage for the
MOSFET(s) with a fully integrated charge pump.
The ISL6146 allows users to adjust with external resistor(s) the
V
- V
trip point, which adjusts the control sensitivity to system
OUT
IN
power supply noise. An open drain FAULT pin will indicate if a
conditional or FET fault has occurred.
The ISL6146A and ISL6146B are optimized for very low voltage
operation, down to 1V with an additional independent bias of 3V
or greater.
The ISL6146C provides a voltage compliant mode of operation
down to 3V with programmable Undervoltage Lock Out and
Overvoltage Protection threshold levels
The ISL6146D and ISL6146E are like the ISL6146A and ISL6146B
respectively but do not have conduction state reporting via the
fault output
.
TABLE 1. KEY DIFFERENCES BETWEEN PARTS IN FAMILY
PART NUMBER
KEY DIFFERENCES
ISL6146A
Separate BIAS and VIN with Active High Enable
ISL6146B
Separate BIAS and VIN with Active Low Enable
ISL6146C
VIN with OVP/UVLO Inputs
ISL6146D
ISL6146A wo Conduction Monitor & Reporting
ISL6146E
ISL6146B wo Conduction Monitor & Reporting
Q1
+
VIN GATE VOUT
VOLTAGE
BIAS
ADJ
DC/DC
ISL6146B
(3V - 20V)
FLT
EN
GND
-
Q2
+
VIN GATE VOUT
VOUT
VOLTAGE
BIAS
ADJ
DC/DC
ISL6146B
(3V - 20V)
FLT
EN
GND
-
FIGURE 1. TYPICAL APPLICATION
1
April 26, 2013
FN7667.4
Features
• OR-ing Down to 1V and Up to 20V with ISL6146A, ISL6146B,
ISL6146D and ISL6146E
• Programmable Voltage Compliant Operation with ISL6146C
• VIN Hot Swap Transient Protection Rating to +24V
• High Speed Comparator Provides Fast <0.3µs Turn-off in
Response to Shorts on Sourcing Supply
• Fastest Reverse Current Fault Isolation with 6A Turn-off
Current
• Very Smooth Switching Transition
• Internal Charge Pump to Drive N-channel MOSFET
• User Programmable V
• Open Drain FAULT Output with Delay
- Short between any two of the OR-ing FET Terminals
- GATE Voltage and Excessive FET V
- Power-Good Indicator (ISL6146C)
• MSOP and DFN Package Options
Applications
• N+1 Industrial and Telecom Power Distribution Systems
• Uninterruptable Power Supplies
• Low Voltage Processor and Memory
• Storage and Datacom Systems
+
C
O
M
M
O
N
P
GATE FAST OFF, ~200ns FALL TIME
O
W
~70ns FROM 20V TO 12.6V ACROSS 57nF
E
GATE OUTPUT SINKING ~ 6A
R
B
U
S
+ C
O
M
M
O
N
P
O
W
E
R
B
U
S
FIGURE 2. ISL6146 GATE HIGH CURRENT PULL-DOWN
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 1-888-468-3774
Copyright Intersil Americas LLC 2011-2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
- V
Vth for Noise Immunity
IN
OUT
DS

ISL6146AFRZ-T7A Summary of contents

  • Page 1

    ... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2011-2013. All Rights Reserved Intersil (and design trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners Vth for Noise Immunity ...

  • Page 2

    Block Diagram Q-PUMP BIAS VDS FORWARD + REGULATOR VIN 19mV VOUT REVERSE DETECTION COMPARATOR 57mV + ENABLE * ADJ HIGH SPEED + COMPARATOR * Connected to BIAS on ISL6146A/B/D/E Connected to VOUT on ISL6146C Pin Configuration ISL6146A, ISL6146B, ISL6146D, ISL6146E ...

  • Page 3

    ... turned off. Range 24V PAD Thermal Pad Connect to GND Ordering Information PART NUMBER (Notes ISL6146AFUZ ISL6146AFUZ-T ISL6146AFUZ-T7A ISL6146AFUZ-TK ISL6146AFRZ ISL6146AFRZ-T ISL6146AFRZ-T7A ISL6146AFRZ-TK ISL6146BFUZ ISL6146BFUZ-T ISL6146BFUZ-T7A ISL6146BFUZ-TK ISL6146BFRZ ISL6146BFRZ-T ISL6146BFRZ-T7A ISL6146BFRZ-TK ISL6146CFUZ 3 ISL6146 DESCRIPTION +0 ...

  • Page 4

    ... These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. ...

  • Page 5

    ... Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical Performance Curves Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Power-Up Considerations .18 Typical Applications Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 ISL6146 Evaluation Platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Description and Use of the Evaluation Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 L8.3x3J .27 M8.118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 5 ISL6146 FN7667.4 April 26, 2013 ...

  • Page 6

    Absolute Maximum Ratings BIAS, VIN, VOUT ...

  • Page 7

    Electrical Specifications V temperature range, -40°C to +125°C. (Continued) SYMBOL PARAMETERS t Slow Turn-off Time toffs I Turn-On Current ON V GATE to V Rising Fault Voltage VG_FLTr IN V GATE to V Falling Fault Voltage VG_FLTf IN CONTROL AND ...

  • Page 8

    Electrical Specifications V temperature range, -40°C to +125°C. (Continued) SYMBOL PARAMETERS t EN/UVLO Falling to GATE Falling Delay EN2GTEF EN/OVP Rising to GATE Falling Delay Ren_h ENABLE Pull-Down Resistor Ren_l ENABLE Pull-Up Resistor Vadj ADJ Pin Voltage Radj ADJ Pull-Up ...

  • Page 9

    Typical Performance Curves 4.0 3.5 3.0 2.5 18V DISABLED 12V DISABLED 3V DISABLED 2.0 1.5 1.0 -40 25 TEMPERATURE (°C) FIGURE 3. ISL6146A/B/D/E BIAS AND ISL6146C V TEMPERATURE 35 BIAS = 18V 30 BIAS = 12V BIAS ...

  • Page 10

    Typical Performance Curves 750 OVP RISING 700 650 600 UVLO RISING AND OVP FALLING 550 500 450 -40 25 TEMPERATURE (°C) FIGURE 9. ISL6146C UVLO/OVP Vth vs TEMPERATURE 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 -40 ...

  • Page 11

    Typical Performance Curves -40 25 TEMPERATURE (°C) FIGURE 15. HIGH SPEED COMPARATOR OFFSET VOLTAGE 900 800 R ADJ 700 600 500 400 300 200 100 R TO GND = 100k ADJ 0 -40 ...

  • Page 12

    Typical Performance Curves GATE1 IIN1 FIGURE 21. ISL6146C SLOW RAMP CONNECT 12V OR-ing GATE1 IIN2 FIGURE 23. ISL6146C HOT SWAP CONNECT 12V OR-ing EN/UVLO FIGURE 25. ISL6146A/D EN/ISL6146C UVLO TO GATE ON DELAY 12 ISL6146 (Continued) GATE 2 GATE 2 ...

  • Page 13

    Typical Performance Curves EN FIGURE 27. ISL6146B GATE ON DELAY OVP FIGURE 29. ISL6146C OVP TO GATE ON DELAY V RISING THROUGH BOTH THE PROGRAMMED UVLO IN AND OVP LEVELS. GATE TURNS- THEN TURNS-OFF AS V ...

  • Page 14

    Typical Performance Curves GATE V IN VIN VOUT FIGURE 33. BACK-TO-BACK FET TURN_ON DETAIL GATE FAST OFF, ~200ns FALL TIME ~70ns FROM 20V TO 12.6V ACROSS 57nF GATE OUTPUT SINKING ~ 6A FIGURE 35. ...

  • Page 15

    Typical Performance Curves VIN GATE FIGURE 39. V HOT SWAPPED TO GATE WITH BIAS = 12V NO LOAD COMP ADJUST V FIGURE 41. HIGH SPEED ...

  • Page 16

    Typical Performance Curves FLT GATE VIN FIGURE 45. ISL6146A FLT RESPONSE TO NON-CONDUCTION 16 ISL6146 (Continued) FLT GATE VIN FIGURE 46. ISL6146D FLT RESPONSE TO NON-CONDUCTION FN7667.4 April 26, 2013 ...

  • Page 17

    Functional Description Functional Overview In a redundant power distribution system, similar potential and parallel power supplies each contribute to the load current through various active and passive current sharing schemes. Typically OR-ing power diodes are used to protect against reverse ...

  • Page 18

    Applications Information Power-Up Considerations BIAS AND V CONSTRAINTS IN Upon power-up when the V supply is separate from the BIAS IN supply, the BIAS voltage must be greater or equal to the V voltage at all times. When using a ...

  • Page 19

    The Figure 1 circuit shown on page 1 is the basic circuit used for OR-ing voltages >3V to 20V. The ISL6146A application shown in Figure 47 is the configuration for OR-ing very low voltages 3V. Additionally, this ...

  • Page 20

    regardless of the V The ISL6146 bias is pulled from the common drain node to ensure an always adequate bias from either source when the other is absent Q1 V EXT 3.3V - 24V ...

  • Page 21

    BATT SUPPLY VOUT GATE FIGURE 55. EXTERNAL SUPPLY > BATT SUPPLY DISCONNECTED ISL6146 Evaluation Platforms Description and Use of the Evaluation Boards The three ISL6146 evaluation boards are used to demonstrate the four application configurations discussed earlier. All the boards ...

  • Page 22

    FIGURE 56. ISL6146AEVAL1Z FIGURE 58. ISL6146BEVAL1Z 22 ISL6146 FIGURE 57. ISL6146AEVAL1Z SCHEMATIC FIGURE 59. ISL6146BEVAL1Z SCHEMATIC FN7667.4 April 26, 2013 ...

  • Page 23

    FIGURE 60. ISL6146CEVAL1Z Dimensions are 1” x 0.5” (25.4mm x 12.7mm) FIGURE 62. ISL6146DEVAL1Z 23 ISL6146 FIGURE 61. ISL6146CEVAL1Z SCHEMATIC FIGURE 63. ISL6146EDEV1Z SCHEMATIC (Mini-eval) FN7667.4 April 26, 2013 ...

  • Page 24

    ... Generic Generic Generic Generic Generic Generic Generic Generic Generic Generic Generic Intersil ISL6146BFUZ Various Generic Generic Generic Generic Generic Generic Generic Generic Generic Generic Intersil ISL6146CFUZ Various Generic Generic Generic Generic Generic Generic Generic Generic Generic Generic Generic April 26, 2013 FN7667.4 ...

  • Page 25

    ... ISL6146E OR-ing FET Controller DNP RES, SMD, 0603, 1% 4.99kΩ RES, SMD, 0603, 1% 10kΩ RES, SMD, 0603, 1% 1µF CAP, SMD, 0603, 50V, 10% MANUFACTURER PART NUMBER Intersil ISL6146DFUZ Generic Generic Generic Generic Intersil ISL6146EFUZ Generic Generic Generic Generic April 26, 2013 FN7667.4 ...

  • Page 26

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. ...

  • Page 27

    Package Outline Drawing L8.3x3J 8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 0 9/09 3.00 (4X) 0.15 6 PIN 1 INDEX AREA TOP VIEW ( 2. 1.95) (1.64) ( 2.80 ) PIN 1 (6x 0.65) TYPICAL RECOMMENDED LAND ...

  • Page 28

    Package Outline Drawing M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 4, 7/11 3.0±0. PIN TOP VIEW H 0.25 - 0.36 0. A-B D SIDE VIEW 1 (5.80) (4.40) (3.00) ...