FAN3989MLP8X Fairchild Semiconductor, FAN3989MLP8X Datasheet - Page 9

IC USB CONNECTION MONITOR 8MLP

FAN3989MLP8X

Manufacturer Part Number
FAN3989MLP8X
Description
IC USB CONNECTION MONITOR 8MLP
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FAN3989MLP8X

Function
Over/Under Voltage Protection
Voltage - Supply
2.7 V ~ 20 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FAN3989MLP8XTR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FAN3989MLP8X
Quantity:
6 815
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
Applications Information
The FAN3989 sets the FLAG1 pin to logic HIGH or
LOW as an indicator to the system controller that a
standard USB device or a charger is connected to the
USB port. The FAN3989 also monitors the V
over- or under-voltage conditions. If V
3.3V or greater than 6.0V, the FLAG2 pin is set LOW
and the internal load switch control pin is set HIGH,
turning off the PMOS switch.
Where a USB transceiver is not incorporated or there
is a switch between the USB port and the FAN3989,
external resistors are used to set the correct input
logic states on the D+ and D- inputs. A 5MΩ pull-
down on the D- line and a 1MΩ pull-up to V
D+ line are recommended. If a charger is plugged into
U S B
V BUS
D -
D +
G n d
Figure 13.
5 M
V DD
1 M
V
BUS
GND
D+
D-
Mobile Phone Battery Charging System without USB Interface
(Continued)
BUS
is less than
DD
BUS
on the
Comparato r
OV P
UV P
for
Std USB /
Charge r
Detec t
9
the USB port (D+ and D- shorted), the voltage divider
of 1M and 5M put a voltage of 2.3V on the D+D-
inputs and flag1 is HIGH, indicating a charger is
connected to port.
If the USB port is connected to a standard USB
device, the D+ input is pulled up to V
parallel with the 1.5KΩ on a USB transceiver with a
parallel R value of 1.497KΩ. The D- input is
connected to a 15KΩ pull-down by the USB device
and in parallel with 5MΩ with a parallel R value of
14.955KΩ. This condition forces flag1 LOW. If D+ and
D- are open (floating), D+ is pulled to V
floats LOW, which forces flag1 LOW.
LSctrl
Contro l
Batter y
Logi c
Logi c
V
R s en s e
OUT
Flag 2
Flag 1
DD
www.fairchildsemi.com
DD
and is in
and D-

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