IC CTRLR PWM STP-DN TRIPL 32WQFN

MAX15048ETJ+

Manufacturer Part NumberMAX15048ETJ+
DescriptionIC CTRLR PWM STP-DN TRIPL 32WQFN
ManufacturerMaxim Integrated Products
MAX15048ETJ+ datasheet
 


Specifications of MAX15048ETJ+

ApplicationsPower Supply Controller, SequencerVoltage - Supply4.7 V ~ 23 V
Current - Supply6mAOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case32-WQFN Exposed Pad
Number Of Outputs3Output Voltage5 V
Input Voltage4.7 V to 23 VSupply Current6 mA
Switching Frequency200 KHzMounting StyleSMD/SMT
Maximum Operating Temperature+ 85 CMinimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusLead free / RoHS CompliantVoltage - Input-
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The desired (compensated) rolloff follows a -20dB/
decade slope (and commensurate 90° of phase shift),
and, in this example, occurs at approximately six times
the uncompensated crossover frequency, f
example, a Type II compensator provides stable closed-
loop operation, leveraging the +20dB/decade slope of
the capacitor’s ESR zero (see Figure 4b).
The Type II compensator’s midfrequency gain (approxi-
mately 18dB shown here) is designed to compensate for
the power modulator’s attenuation at the desired cross-
over frequency, f
(G
+ G
CO
E/A
MOD
example, the power modulator’s inherent -20dB/decade
80
60
40
20
0
-20
-40
-60
-80
Figure 4b. Power Modulator (Large, Bulk C
40
20
0
-20
-40
-60
-80
Figure 4c. Power Modulator Gain and Phase Response (High-Quality C
______________________________________________________________________________________
Triple-Output Buck Controllers
with Tracking/Sequencing
rolloff above the ESR zero (f
extend the active regulation gain bandwidth of the volt-
age regulator. As shown in Figure 4b, the net result is a
. In this
six-time increase in the regulator’s gain bandwidth while
CO
providing greater than 75° of phase margin (the differ-
ence between G
crossover, f
Other filter schemes pose their own problems. For
instance, when choosing high-quality filter capacitor(s)
(e.g., MLCCs) and inductor, with minimal parasitics, the
= 0dB at f
). In this
inherent ESR zero can occur at a much higher frequency,
CO
as shown in Figure 4c.
< G
E/A
f
LC
|G
|
E/A
f
ZERO, ESR
|G
|
< G
MOD
MOD
f
ZERO, ESL
FREQUENCY (Hz)
) and Type II Compensator Responses
OUT
|G
|
MOD
f
LC
|G
| ASYMPTOTE
MOD
< G
MOD
FREQUENCY (Hz)
)
OUT
) is leveraged to
ZERO, ESR
and G
respective phases at
E/A
MOD
).
CO
180
135
90
45
0
-45
-90
-135
-180
90
45
0
f
ZERO, ESR
-45
-90
f
-135
ZERO, ESL
-180
23