IC CTRLR PWM STP-DN TRIPL 32WQFN

MAX15048ETJ+

Manufacturer Part NumberMAX15048ETJ+
DescriptionIC CTRLR PWM STP-DN TRIPL 32WQFN
ManufacturerMaxim Integrated Products
MAX15048ETJ+ datasheet
 


Specifications of MAX15048ETJ+

ApplicationsPower Supply Controller, SequencerVoltage - Supply4.7 V ~ 23 V
Current - Supply6mAOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case32-WQFN Exposed Pad
Number Of Outputs3Output Voltage5 V
Input Voltage4.7 V to 23 VSupply Current6 mA
Switching Frequency200 KHzMounting StyleSMD/SMT
Maximum Operating Temperature+ 85 CMinimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusLead free / RoHS CompliantVoltage - Input-
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PWM Controller
Applications Information
Power Dissipation
The 32-pin TQFN thermally enhanced package can
dissipate up to 2758.6mW. Calculate power dissipation
in the MAX15048/MAX15049 as a product of the input
voltage and the total REG output current (I
includes quiescent current (I
) and the total gate-drive
Q
current (I
):
DREG
P
= V
x I
D
IN
REG
I
= I
+ [f
x (Q
REG
Q
SW
G1
+ Q
+ Q
+ Q
G3
G4
where Q
to Q
comprise the total gate charge of the
G1
G6
low-side and high-side external MOSFETs, f
switching frequency of the converter, and I
escent current of the device at the switching frequency.
Use the following equation to calculate the maximum
power dissipation (P
) in the chip at a given ambient
DMAX
temperature (T
):
A
P
= 34.5 x (150 - T
DMAX
PCB Layout Guidelines
Use the following guidelines to lay out the switching volt-
age regulator:
1) Place the IN, REG, and DREG_ bypass capacitors
close to the MAX15048/MAX15049.
2) Minimize the area and length of the high-current
loops from the input capacitor, upper switching
MOSFET, inductor, and output capacitor back to the
input capacitor negative terminal.
Chip Information
PROCESS: BiCMOS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2010 Maxim Integrated Products
©
Triple-Output Buck Controllers
with Tracking/Sequencing
3) Keep the current loop formed by the lower switching
MOSFET, inductor, and output capacitor short.
4) Keep SGND and PGND_ isolated and connect them
at one single point close to the negative terminal of
the input filter capacitor.
5) Avoid long traces between the DREG_ bypass
capacitor, low-side driver outputs of the MAX15048/
). I
REG
REG
MAX15049, MOSFET gate, and PGND_. Minimize
the loop formed by the DREG_ bypass capacitor,
bootstrap capacitor, high-side driver output of the
MAX15048/MAX15049, and upper MOSFET gates.
+ Q
G2
6) Place the bank of the output capacitors close to the
load.
+ Q
)]
G5
G6
7) Distribute the power components evenly across the
board for proper heat dissipation.
is the
SW
is the qui-
Q
8) Provide sufficient copper area at and around the
switching MOSFETs and inductor to aid in thermal
dissipation.
9) Connect the MAX15048/MAX15049 exposed pad to
a large copper plane to maximize its power dissipa-
tion capability. Connect the exposed pad to SGND.
)mW
A
Do not connect the exposed pad to the SGND pin
directly underneath the IC.
10) Use 2oz copper to keep the trace inductance
and resistance to a minimum. Thin copper PCBs
can compromise efficiency since high currents are
involved in the application. Also, thicker copper
conducts heat more effectively, thereby reducing
thermal impedance.
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE
32 TQFN-EP
Maxim is a registered trademark of Maxim Integrated Products, Inc.
Package Information
PACKAGE CODE
DOCUMENT NO.
T3255+4
21-0140
31