LM25037MT/NOPB National Semiconductor, LM25037MT/NOPB Datasheet - Page 12

• Manufacturer Part Number: LM25037MT/NOPB
• Description: IC CTLR PWM C/V MODE 16-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM25037MT/NOPB

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 1
• Frequency - Max: 578kHz
• Duty Cycle: 88%
• Voltage - Supply: 5.5 V ~ 75 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Frequency-max: 578kHz
• For Use With: LM25037EVAL - BOARD EVAL FOR LM25037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM25037MT

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CURRENT MODE
The LM25037 can be configured for current mode control by
injecting a signal representative of primary current into the
RAMP pin. One way to achieve this is shown in
components R
noise spikes. The signal at the CS pin is thus a ramp on a
pedestal. The pedestal corresponds to the continuous con-
duction current in the transformer at the beginning of an
OUTA or OUTB conduction cycle. The R-C circuit (R
C
ramp to the current sense signal. This additional ramp signal,
known as slope compensation, is required to avoid instabili-
ties at duty cycles above 50% (25% per phase). The com-
pensated RAMP signal consists of two parts, the primary
current signal and the slope compensation. The compensat-
ed RAMP signal is compared to the error signal by the PWM
comparator to control the duty cycle of the outputs. The RAMP
Slope
), shown in
filter
Figure
and C
filter
5, tied to V
are used to filter leading edge
FIGURE 4. Feed-Forward Voltage Mode Configuration
REF
adds an additional
Figure
Slope
5. Filter
and
12
capacitor and CS capacitor are reset through internal dis-
charge FETs. The R
(typical); this ensures fast discharge of the RAMP reset ca-
pacitor. Any dc voltage source can be used in place of V
to generate the slope compensation ramp.
The timing diagram shown in
mode waveforms and relative timing. When OUTA or OUTB
is enabled, the signal at the RAMP pin consists of the CS pin
signal (current ramp on a pedestal) plus the slope compen-
sation ramp (dotted lines). When OUTA or OUTB is turned
off, the primary current component is absent but the voltage
at the RAMP pin continues to rise due to slope compensation
component until the end of the clock period, after which it is
reset by the RAMP discharge FET. A component selection
example is explained in detail in the Applications Information
section.
DS(ON)
of RAMP discharge FET is 5Ω
Figure 6
depicts the current
30065121
REF