LM5642XMT/NOPB National Semiconductor, LM5642XMT/NOPB Datasheet - Page 6

• Manufacturer Part Number: LM5642XMT/NOPB
• Description: IC CONV SYNC DUAL BUCK 28-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Step-Down (Buck)r

Specifications of LM5642XMT/NOPB

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 1.3 ~ 35 V
• Current - Output: 20A
• Frequency - Switching: 375kHz
• Voltage - Input: 4.5 ~ 36 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Power - Output: 1.1W
• For Use With: LM5642EVAL-KIT - BOARD EVALUATION LM5642
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM5642XMT; *LM5642XMT/NOPB; LM5642XMT

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Range indicates conditions for which the device is
intended to be functional, but does not guarantee specfic performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: ON/SS1 and ON/SS2 are internally pulled up to one diode drop above VLIN5. Do not apply an external pull-up voltage to these pins. It may cause damage
to the IC.
)/θ
Note 3: The maximum allowable power dissipation is calculated by using P
= (T
- T
, where T
is the maximum junction temperature, T
is the
DMAX
JMAX
A
JA
JMAX
A
ambient temperature and θ
is the junction-to-ambient thermal resistance of the specified package. The power dissipation ratings results from using 125°C, 25°
JA
, and θ
respectively. A θ
C, and 90.6°C/W for T
, T
of 90.6°C/W represents the worst-case condition of no heat sinking of the 28-pin TSSOP. The eTSSOP
JMAX
A
JA
JA
package has a θ
of 29°C/W. The eTSSOP package thermal ratings results from the IC being mounted on a 4 layer JEDEC standard board using the same
JA
temperature conditions as the TSSOP package above. A thermal shutdown will occur if the temperature exceeds the maximum junction temperature of the device.
Note 4: For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook available from National Semiconductor Corporation.
Note 5: For testing purposes, ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5 kΩ resistor.
Note 6: A typical is the center of characterization data measured with low duty cycle pulse tsting at T
= 25°C. Typicals are not guaranteed.
A
Note 7: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T
= T
= 25°C. All hot and cold
A
J
limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
Note 8: Both switching controllers are off. The linear regulator VLIN5 remains on.
Note 9: When SS1 and SS2 pins are charged above this voltage and either of the output voltages at Vout1 or Vout2 is still below the regulation limit, the under
voltage protection feature is initialized.
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