ADP3290JCPZ-RL ON Semiconductor, ADP3290JCPZ-RL Datasheet - Page 27

• Manufacturer Part Number: ADP3290JCPZ-RL
• Description: IC CTLR BUCK SW REG 40-LFCSP
• Manufacturer: ON Semiconductor
• Type: Step-Down (Buck)r

Specifications of ADP3290JCPZ-RL

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 4
• Voltage - Output: 0.5 ~ 1.6 V
• Frequency - Switching: 250kHz ~ 4MHz
• Voltage - Input: 12V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Output Voltage: 0.5 V to 1.6 V
• Output Current: 500 uA
• Input Voltage: - 0.3 V to + 6.3 V
• Supply Current: 25 mA
• Switching Frequency: 450 kHz
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DC Load Line Setting
AC Load Line Setting
R
R
CS1(NEW)
11. Remove the dc load from the circuit and hook up
12. Hook up the scope to the output voltage and set it
13. Set the dynamic load for a transient step of about
14. Measure the output waveform (use dc offset on
15. Use the horizontal cursors to measure V
16. If V
CS2(NEW)
3. Measure the output voltage at no load (V
4. Measure the output voltage at full load cold
5. Repeat Step 4 until the cold and hot voltage
6. Measure the output voltage from no load to full
Verify that it is within tolerance.
(V
full load, and then measure the output (V
If there is a change of more than a few mV, adjust
R
measurements remain the same.
load using 5 A steps. Compute the load line slope
the dynamic load.
to dc coupling with the time scale at 100 ms/div.
40 A at 1 kHz with 50% duty cycle.
scope to see the waveform). Try to use a vertical
scale of 100 mV/div or finer. This waveform
should look similar to Figure 16.
V
the undershoot or overshoot that happens
immediately after this step.
a few millivolts, use Equation 51 to adjust C
Users may need to parallel different values to get
the right one because limited standard capacitor
CS1
DCDRP
FLCOLD
Figure 16. AC Load Line Waveform
ACDRP
+
and R
+ R
R
as shown in Figure 16. Do not measure
CS1(OLD)
). Let the board sit for ~10 minutes at
CS2(OLD)
and V
CS2
using Equation 49 and Equation 51.
DCDRP
R
TH(25
V
V
NL
NL
are different by more than
V
* V
o
* V
ACDRP
C)
) R
FLCOLD
FLHOT
R
CS1(OLD)
CS1(OLD)
V
DCDRP
ACDRP
NL
FLHOT
*R
(eq. 49)
).
)R
CS.
http://onsemi.com
CS1(NEW)
and
).
TH(25
1
o
27
C)
Initial Transient Setting
R
10. Measure the output ripple at no load and full load
CS1(OLD)
17. Repeat Step 11 to Step 13 and repeat the
18. With the dynamic load still set at the maximum step
7. If R
8. Repeat Step 6 and Step 7 to check the load line.
9. When the dc load line adjustment is complete, do
for each change, and then average to get the
overall load line slope (R
use Equation 50 to adjust the R
Repeat adjustments if necessary.
not change R
remainder of the procedure.
with a scope, and make sure it is within
specifications.
values are available. It is a good idea to have
locations for two capacitors in the layout for this.
adjustments, if necessary. Once complete, do not
change C
Set the dynamic load step to maximum step size.
Do not use a step size larger than needed. Verify
that the output waveform is square, which means
that V
size, expand the scope time scale to either 2 ms/div
or 5 ms/div. The waveform can have two overshoots
and one minor undershoot (see Figure 17). Here,
V
Figure 17. Transient Setting Waveform
DROOP
V
TRAN1
OMEAS
*R
R
R
CS2(NEW)
ACDRP
CS(NEW)
TH(25
is the final desired value.
CS
is off from R
for the remainder of the procedure.
o
PH
and V
V
C)
TRAN2
+ R
+ R
, R
*
CS1
DCDRP
R
CS2(OLD)
CS(OLD)
TH(25
, R
1
O
CS2
OMEAS
V
o
are equal.
by more than 0.05 mW,
DROOP
C)
, or R
V
V
PH
R
ACDRP
DCDRP
).
OMEAS
R
TH
values.
O
for the
(eq. 51)
(eq. 50)
(eq. 52)