C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 113

• Manufacturer Part Number: C8051F020-TB
• Description: BOARD PROTOTYPING W/C8051F020
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F020-TB

• Contents: Board
• Processor To Be Evaluated: C8051F02x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F020
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits should not
be set to logic l. Future product versions may use these bits to implement new features in which case the reset value
of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of the remaining SFRs are included
in the sections of the datasheet associated with their corresponding system function.
Bits7-0:
Bits7-0:
Bits7-0:
R/W
R/W
R/W
Bit7
Bit7
Bit7
SP: Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented before
every PUSH operation. The SP register defaults to 0x07 after reset.
DPL: Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly addressed
XRAM and FLASH memory.
DPH: Data Pointer High.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indirectly addressed
XRAM and FLASH memory.
R/W
R/W
R/W
Bit6
Bit6
Bit6
Figure 12.5. DPH: Data Pointer High Byte
R/W
R/W
R/W
Bit5
Bit5
Bit5
Figure 12.4. DPL: Data Pointer Low Byte
Figure 12.3. SP: Stack Pointer
R/W
R/W
R/W
Bit4
Bit4
Bit4
R/W
R/W
R/W
Bit3
Bit3
Bit3
Rev. 1.4
R/W
R/W
R/W
Bit2
Bit2
Bit2
C8051F020/1/2/3
R/W
R/W
R/W
Bit1
Bit1
Bit1
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
00000000
00000111
Reset Value
Reset Value
Reset Value
0x81
0x82
0x83
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