C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 183

• Manufacturer Part Number: C8051F020-TB
• Description: BOARD PROTOTYPING W/C8051F020
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F020-TB

• Contents: Board
• Processor To Be Evaluated: C8051F02x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F020
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.
The SMBus0 I/O interface is a two-wire, bi-directional serial bus. SMBus0 is compliant with the System Manage-
ment Bus Specification, version 1.1, and compatible with the I
system controller are byte oriented with the SMBus0 interface autonomously controlling the serial transfer of the
data. Data can be transferred at up to 1/8th of the system clock if desired (this can be faster than allowed by the
SMBus specification, depending on the system clock used). A method of extending the clock-low duration is avail-
able to accommodate devices with different speed capabilities on the same bus.
SMBus0 may operate as a master and/or slave, and may function on a bus with multiple masters. SMBus0 provides
control of SDA (serial data), SCL (serial clock) generation and synchronization, arbitration logic, and START/STOP
control and generation. SMBus0 is controlled by SFRs as described in
SMBUS
IRQ
SYSTEM MANAGEMENT BUS / I
S
L
V
6
S
L
V
5
SMB0ADR
S
L
V
4
B
U
S
Y
Interrupt
Request
B
S
L
V
3
M
E
N
S
B
7
S
L
V
2
SMB0CN
S
T
A
A
S
L
V
1
O
S
T
S
L
V
0
S
I
G
C
A
A
F
T
E
B
O
T
E
SFR Bus
0000000b
SMBUS CONTROL LOGIC
Arbitration
SCL Synchronization
Status Generation
SCL Generation (Master Mode)
IRQ Generation
A
7 MSBs
S
A
T
7
S
A
SFR Bus
T
6
SMB0STA
S
T
A
Figure 18.1. SMBus0 Block Diagram
5
S
T
A
4
8
S
T
A
3
SMB0DAT
S
T
A
2
Read
S
T
A
1
7
S
T
A
0
6
8
SMB0DAT
5
4
C
R
7
3
C
R
6
Clock Divide
Data Path
8
Control
2
SMB0CR
C
R
5
Logic
1
SMB0DAT
C
R
4
Write to
0
C
R
3
C
R
2
Rev. 1.4
C
R
1
Control
C
R
0
SDA
2
2
Control
C BUS (SMBUS0)
C serial bus. Reads and writes to the interface by the
SCL
1
0
SYSCLK
Section 18.4 on page
FILTER
FILTER
N
N
C8051F020/1/2/3
SDA
SCL
C
R
O
R
S
S
B
A
189.
Port I/O
183