PIC18F14K50-I/SS Microchip Technology, PIC18F14K50-I/SS Datasheet - Page 141

IC PIC MCU FLASH 8KX16 20-SSOP

PIC18F14K50-I/SS

Manufacturer Part Number
PIC18F14K50-I/SS
Description
IC PIC MCU FLASH 8KX16 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F14K50-I/SS
Manufacturer:
IR
Quantity:
14 500
Part Number:
PIC18F14K50-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F14K50-I/SS
0
REGISTER 15-2:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
WCOL
R/W-0
2:
3:
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by
writing to the SSPBUF register.
When enabled, these pins must be properly configured as input or output.
Bit combinations not specifically listed here are either reserved or implemented in I
WCOL: Write Collision Detect bit (Transmit mode only)
1 = The SSPBUF register is written while it is still transmitting the previous word
0 = No collision
SSPOV: Receive Overflow Indicator bit
SPI Slave mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case of over-
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
1 = Enables serial port and configures SCK, SDO, SDI and SS as serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled
0011 = SPI Master mode, clock = TMR2 output/2
0010 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0000 = SPI Master mode, clock = F
SSPOV
R/W-0
(must be cleared by software)
flow, the data in SSPSR is lost. Overflow can only occur in Slave mode. The user must read the
SSPBUF, even if only transmitting data, to avoid setting overflow (must be cleared by software).
SSPCON1: MSSP CONTROL 1 REGISTER (SPI MODE)
W = Writable bit
‘1’ = Bit is set
SSPEN
R/W-0
R/W-0
CKP
Preliminary
OSC
OSC
OSC
(1)
/64
/16
/4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
SSPM3
R/W-0
(3)
PIC18F/LF1XK50
SSPM2
R/W-0
x = Bit is unknown
SSPM1
R/W-0
2
C mode only.
DS41350E-page 141
SSPM0
R/W-0
bit 0

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