PIC18F14K50-I/SS Microchip Technology, PIC18F14K50-I/SS Datasheet - Page 177

• Manufacturer Part Number: PIC18F14K50-I/SS
• Description: IC PIC MCU FLASH 8KX16 20-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 15-27:
FIGURE 15-28:
 2010 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
S
BCLIF
SSPIF
SDA
SCL
SEN
BUS COLLISION DURING START CONDITION (SCL = 0)
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA pulled low by other master.
Reset BRG and assert SDA.
‘0’
‘0’
SCL = 0 before BRG time-out,
bus collision occurs. Set BCLIF.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
Less than T
BRG
SDA = 0, SCL = 1
SDA = 0, SCL = 1
Preliminary
SDA = 0, SCL = 1,
set SSPIF
T
Set SEN, enable START
sequence if SDA = 1, SCL = 1
BRG
S
Set S
T
BRG
T
BRG
Set SSPIF
PIC18F/LF1XK50
SCL = 0 before SDA = 0,
bus collision occurs. Set BCLIF.
SCL pulled low after BRG
time-out
Interrupt cleared
by software
Interrupts cleared
by software
‘0’
‘0’
‘0’
DS41350E-page 177