AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 36

IC ARM9 MCU 208 PQFP

AT91RM9200-QU-002

Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-QU-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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11.3
11.3.1
11.3.2
11.3.3
11.3.4
36
ARM9TDMI Processor
AT91RM9200
Instruction Type
Data Types
ARM9TDMI Operating Modes
ARM9TDMI Registers
Instructions are either 32 bits (in ARM state) or 16 bits (in Thumb state).
ARM9TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must be
aligned to four-byte boundaries and half-words to two-byte boundaries.
Unaligned data access behavior depends on which instruction is used in a particular location.
The ARM9TDMI, based on ARM architecture v4T, supports seven processor modes:
Mode changes may be made under software control, or may be brought about by external inter-
rupts or exception processing. Most application programs will execute in User Mode. The non-
user modes, known as privileged modes, are entered in order to service interrupts or exceptions
or to access protected resources.
The ARM9TDMI processor core consists of a 32-bit datapath and associated control logic. That
datapath contains 31 general-purpose registers, coupled to a full shifter, Arithmetic Logic Unit
and multiplier.
At any one time, 16 registers are visible to the user. The remainder are synonyms used to speed
up exception processing.
Register 15 is the Program Counter (PC) and can be used in all instructions to reference data
relative to the current instruction.
R14 holds the return address after a subroutine call.
R13 is used (by software convention) as a stack pointer.
Table 11-1.
• User: Standard ARM program execution state
• FIQ: Designed to support high-speed data transfer or channel processes
• IRQ: Used for general-purpose interrupt handling
• Supervisor: Protected mode for the operating system
• Abort mode: Implements virtual memory and/or memory protection
• System: A privileged user mode for the operating system
• Undefined: Supports software emulation of hardware coprocessors
User and
System
Mode
R0
R1
R2
R3
R4
ARM9TDMI Modes and Register Layout
Supervisor
Mode
R0
R1
R2
R3
R4
Abort Mode
R0
R1
R2
R3
R4
Undefined
Mode
R0
R1
R2
R3
R4
Interrupt
Mode
R0
R1
R2
R3
R4
Interrupt
1768I–ATARM–09-Jul-09
Mode
Fast
R0
R1
R2
R3
R4

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