AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 398

• Manufacturer Part Number: AT91RM9200-QU-002
• Description: IC ARM9 MCU 208 PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-QU-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91Rx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, UART, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 122
• Number Of Timers: 10 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 122
• Interface: EBI/EMI, UART/USART
• Ios: 122
• Memory Type: ROM
• Number Of Bits: 32
• Package Type: 208-pin PQFP
• Programmable Memory: 128K Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.65-1.95 V
• Cpu Family: 91R
• Device Core: ARM920T
• Device Core Size: 32b
• Frequency (max): 180MHz
• Total Internal Ram Size: 16KB
• # I/os (max): 122
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 29-5. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 29-6. Master Write with One Byte Internal Address and Multiple Data Bytes
Figure 29-7. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
Figure 29-8. Master Read with One Byte Internal Address and Multiple Data Bytes
398
TXCOMP
TWD
TWD
TWD
TXCOMP
TWD
TWD
TWD
TXRDY
RXRDY
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
Three bytes internal address
Two bytes internal address
One byte internal address
S
S
S
AT91RM9200
S
S
S
S
S
Write THR
Write THR
Write START Bit
DADR
DADR
DADR
DADR
DADR
DADR
DADR
DADR
W
W
W
slave address higher than seven bits, the user must configure the address size (IADRSZ) and
set the other slave address bits in the internal address register (TWI_IADR).
W
• S = Start
W
W
W
W
A
A
A
A
A
A
A
A
IADR(23:16)
IADR(15:8)
IADR(7:0)
IADR(7:0)
IADR(7:0)
IADR(23:16)
IADR(15:8)
IADR(7:0)
A
A
A
A
A
IADR(15:8)
A
A
A
IADR(7:0)
S
S
DADR
DATA
IADR(15:8)
IADR(7:0)
DATA
DADR
A
A
R
Write THR
A
IADR(7:0)
S
A
A
A
A
R
DADR
IADR(7:0)
P
A
DATA
DATA
A
DATA
DATA
S
R
Write THR
Read RHR
A
A
A
A
N
DADR
DATA
A
P
DATA
P
Write STOP Bit
DATA
DATA
DATA
1768I–ATARM–09-Jul-09
R
N
Read RHR
A
P
N
A
A
N
P
P
P
P