MC908AP32CFAE Freescale Semiconductor, MC908AP32CFAE Datasheet - Page 147

IC MCU 32K FLASH 8MHZ 48-LQFP

MC908AP32CFAE

Manufacturer Part Number
MC908AP32CFAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AP32CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908AP32CFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor
Setting MS0B disables the channel 1 status and control register and reverts TCH1 to general-purpose
I/O.
Reset clears the MSxB bit.
When ELSxB:ELSxA ≠ 0:0, this read/write bit selects either input capture operation or unbuffered
output compare/PWM operation.
See
When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output level of the TCHx pin. See
Table
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin.
the ELSxB and ELSxA bits.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Table
9-3. Reset clears the MSxA bit.
9-3.
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
MSxB:MSxA
X0
X1
1X
1X
1X
00
00
00
01
01
01
Table 9-3. Mode, Edge, and Level Selection
ELSxB:ELSxA
MC68HC908AP Family Data Sheet, Rev. 4
00
00
01
10
11
01
10
11
01
10
11
Table 9-3
Output compare
Buffered output
buffered PWM
Output preset
Input capture
compare or
NOTE
or PWM
Mode
shows how ELSxB and ELSxA work. Reset clears
Capture on falling edge only
Capture on rising edge only
Toggle output on compare
Toggle output on compare
Clear output on compare
Clear output on compare
Set output on compare
Set output on compare
Pin under port control;
Pin under port control;
initial output level high
initial output level low
Capture on rising or
Configuration
falling edge
I/O Registers
147

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