MC908AP32CFAE Freescale Semiconductor, MC908AP32CFAE Datasheet - Page 53

IC MCU 32K FLASH 8MHZ 48-LQFP

MC908AP32CFAE

Manufacturer Part Number
MC908AP32CFAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AP32CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908AP32CFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
SCIBDSRC — SCI Baud Rate Clock Source
3.5 Mask Option Register (MOR)
The mask option register (MOR) is used for selecting one of the three clock options for the MCU. The
MOR is a byte located in FLASH memory, and is written to by a FLASH programming routine.
OSCSEL1, OSCSEL0 — Oscillator Selection Bits
Bits 5–0 — Should be left as 1’s
Freescale Semiconductor
SCIBDSRC selects the clock source used for the standard SCI module (non-infrared SCI). The setting
of this bit affects the frequency at which the SCI operates.
OSCSEL1 and OSCSEL0 select which oscillator is used for the MCU CGMXCLK clock. The erase
state of these two bits is logic 1. These bits are unaffected by reset. (See
OSCSEL1
1 = Internal data bus clock, f
0 = Oscillator clock, CGMXCLK, is used as clock source for SCI
0
0
1
1
Address:
The internal oscillator is a free running oscillator and is available after each
POR or reset. It is turned-off in stop mode by setting the STOP_ICLKDIS
bit in CONFIG2.
Erased:
Reset:
Read:
Write:
OSCSEL0
OSCSEL1 OSCSEL0
0
1
0
1
$FFCF
Bit 7
R
1
Figure 3-4. Mask Option Register (MOR)
Table 3-1. CGMXCLK Clock Selection
CGMXCLK
6
1
MC68HC908AP Family Data Sheet, Rev. 4
RCCLK
BUS
X-TAL
= Reserved
ICLK
, is used as clock source for SCI
R
5
1
output of XTAL
OSC2 pin
Inverting
NOTE
Unaffected by reset
f
f
BUS
BUS
R
4
1
R
3
1
Not used
Internal oscillator generates the CGMXCLK.
RC oscillator generates the CGMXCLK.
Internal oscillator is available after each POR
or reset.
X-tal oscillator generates the CGMXCLK.
Internal oscillator is available after each POR
or reset.
R
2
1
Table
Comments
R
1
1
Mask Option Register (MOR)
3-1).
Bit 0
R
1
53

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