MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 297

• Manufacturer Part Number: MC9S12HZ128CAL
• Description: IC MCU 16BIT 128K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128CAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.2.2
Read: anytime
Write: anytime.
Freescale Semiconductor
STEP Pole
l
MODMC
0
1
2
3
RDMCL
Reset
MCZIE
Field
PRE
7
6
5
4
W
R
South
North
West
East
MCZIE
Modulus Counter Underflow Interrupt Enable
0 Interrupt disabled.
1 Interrupt enabled. An interrupt will be generated when the modulus counter underflow interrupt flag (MCZIF)
Modulus Mode Enable
0 The modulus counter counts down from the value in the counter register and will stop at 0x0000.
1 Modulus mode is enabled. When the counter reaches 0x0000, the counter is loaded with the latest value
Note: For proper operation, the MCEN bit should be cleared before modifying the MODMC bit in order to reset
Read Modulus Down-Counter Load
0 Reads of the modulus count register (MDCCNT) will return the present value of the count register.
1 Reads of the modulus count register (MDCCNT) will return the contents of the load register.
Prescaler
0 The modulus down counter clock frequency is the bus frequency divided by 64.
1 The modulus down counter clock frequency is the bus frequency divided by 512.
Note: A change in the prescaler division rate will not be effective until a load of the load register into the modulus
Angle
Modulus Down Counter Control Register (MDCCTL)
180
270
0
7
90
0
is set.
written to the modulus counter register.
the modulus counter to 0xFFFF.
counter count register occurs.
DCOIL = 0 DCOIL = 1 DCOIL = 0 DCOIL = 1
= Unimplemented or Reserved
Figure 10-3. Modulus Down Counter Control Register (MDCCTL)
MODMC
Coil Current
0
0
0
0
COSINE
0
6
+ I max
– I max
0
0
Table 10-7. MDCCTL Field Descriptions
RDMCL
MC9S12HZ256 Data Sheet, Rev. 2.05
0
5
Table 10-6. Full Step States
Coil Current
0
0
0
0
SINE
PRE
+ I max
– I max
0
4
0
0
Description
COSxM (S4) COSxP (S2) COSxP (S1) COSxM (S3)
COSxP (S2) COSxM (S4) COSxM (S3) COSxP (S1)
SINxM (S8)
SINxP (S6)
POL = 0
FLMC
ITG = 1
Integrator input
0
0
3
(Close Switch)
Coil Node to
SINxM (S8)
SINxP (S6)
Chapter 10 Stepper Stall Detector (SSDV1)
POL = 1
MCEN
ITG = 1
0
2
SINxM (S7)
SINxP (S5)
POL = 0
ITG = 1
Reference input
0
0
(Close Switch)
1
Coil Node to
SINxM (S7)
SINxP (S5)
POL = 1
ITG = 1
AOVIE
0
0
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