MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 491
![IC MCU 16BIT 128K FLASH 112-LQFP](/photos/12/21/122139/mc9s12hz128cal_sml.jpg)
MC9S12HZ128CAL
Manufacturer Part Number
MC9S12HZ128CAL
Description
IC MCU 16BIT 128K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12HZ128CAL.pdf
(692 pages)
Specifications of MC9S12HZ128CAL
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12HZ128CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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16.3.2.13 Main Timer Interrupt Flag 2 (TFLG2)
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, write the bit
to one.
Read: Anytime
Write: Used in clearing mechanism (set bits cause corresponding bits to be cleared).
Any access to TCNT will clear TFLG2 register if the TFFCA bit in TSCR register is set.
16.3.2.14 Timer Input Capture/Output Compare Registers High and Low 0–7
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Freescale Semiconductor
Reset
Field
TOF
7
W
Reset
R
Reset
W
R
W
R
TOF
Timer Overflow Flag — Set when 16-bit free-running timer overflows from 0xFFFF to 0x0000. This bit is cleared
automatically by a write to the TFLG2 register with bit 7 set. (See also TCRE control bit explanation.)
(TCxH and TCxL)
0
7
Figure 16-22. Timer Input Capture/Output Compare Register x High (TCxH)
Bit 15
Figure 16-23. Timer Input Capture/Output Compare Register x Low (TCxL)
15
Bit 7
0
0
7
Unimplemented or Reserved
0
0
6
Bit 14
Figure 16-21. Main Timer Interrupt Flag 2 (TFLG2)
14
Bit 6
0
0
6
Table 16-16. TRLG2 Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
Bit 13
13
Bit 5
0
0
5
Bit 12
0
0
4
12
Bit 4
0
0
4
Description
Bit 11
0
0
3
11
Bit 3
0
0
3
Chapter 16 Timer Module (TIM16B8CV1)
Bit 10
0
0
2
10
Bit 2
0
0
2
Bit 9
0
0
1
Bit 1
0
9
0
1
Bit 8
0
0
Bit 0
0
0
0
0
0
491
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