MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 370
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MC9S12HZ128CAL
Manufacturer Part Number
MC9S12HZ128CAL
Description
IC MCU 16BIT 128K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12HZ128CAL.pdf
(692 pages)
Specifications of MC9S12HZ128CAL
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12HZ128CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
The MSCAN then schedules the message for transmission and signals the successful transmission of the
buffer by setting the associated TXE flag. A transmit interrupt (see
is generated
If more than one buffer is scheduled for transmission when the CAN bus becomes available for arbitration,
the MSCAN uses the local priority setting of the three buffers to determine the prioritization. For this
purpose, every transmit buffer has an 8-bit local priority field (PRIO). The application software programs
this field when the message is set up. The local priority reflects the priority of this particular message
relative to the set of messages being transmitted from this node. The lowest binary value of the PRIO field
is defined to be the highest priority. The internal scheduling process takes place whenever the MSCAN
arbitrates for the CAN bus. This is also the case after the occurrence of a transmission error.
When a high priority message is scheduled by the application software, it may become necessary to abort
a lower priority message in one of the three transmit buffers. Because messages that are already in
transmission cannot be aborted, the user must request the abort by setting the corresponding abort request
bit (ABTRQ) (see
(CANTARQ)”.) The MSCAN then grants the request, if possible, by:
12.4.2.3
The received messages are stored in a five stage input FIFO. The five message buffers are alternately
mapped into a single memory area (see
exclusively associated with the MSCAN, but the foreground receive buffer (RxFG) is addressable by the
CPU (see
applicable for the receive process.
All receive buffers have a size of 15 bytes to store the CAN control bits, the identifier (standard or
extended), the data contents, and a time stamp, if enabled (see
Message
The receiver full flag (RXF) (see
signals the status of the foreground receive buffer. When the buffer contains a correctly received message
with a matching identifier, this flag is set.
On reception, each message is checked to see whether it passes the filter (see
Acceptance
valid message, the MSCAN shifts the content of RxBG into the receiver FIFO
generates a receive interrupt (see
handler must read the received message from the RxFG and then reset the RXF flag to acknowledge the
interrupt and to release the foreground buffer. A new message, which can follow immediately after the IFS
1. The transmit interrupt occurs only if not masked. A polling scheme can be applied on TXEx also.
2. Only if the RXF flag is not set.
3. The receive interrupt occurs only if not masked. A polling scheme can be applied on RXF also.
370
1. Setting the corresponding abort acknowledge flag (ABTAK) in the CANTAAK register.
2. Setting the associated TXE flag to release the buffer.
3. Generating a transmit interrupt. The transmit interrupt handler software can determine from the
setting of the ABTAK flag whether the message was aborted (ABTAK = 1) or sent (ABTAK = 0).
Storage”).
Figure
1
Filter”) and simultaneously is written into the active RxBG. After successful reception of a
Receive Structures
when TXEx is set and can be used to drive the application software to re-load the buffer.
12-36). This scheme simplifies the handler software because only one address area is
Section 12.3.2.9, “MSCAN Transmitter Message Abort Request Register
Section 12.3.2.5, “MSCAN Receiver Flag Register
Section 12.4.8.3, “Receive
MC9S12HZ256 Data Sheet, Rev. 2.05
Figure
12-36). The background receive buffer (RxBG) is
Interrupt”) to the CPU
Section 12.3.3, “Programmer’s Model of
Section 12.4.8.2, “Transmit
Section 12.4.3, “Identifier
2
, sets the RXF flag, and
3
Freescale Semiconductor
. The user’s receive
(CANRFLG)”)
Interrupt”)
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