M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 114

• Manufacturer Part Number: M30833FJGP#U3
• Description: IC M32C/83 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: R8C
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 87
• Interface Type: UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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10. Interrupts
10.1 Types of Interrupts
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10.2 Software Interrupts
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Figure 10.1 Interrupts
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Software interrupt occurs when an instruction is executed. The software interrupts are non-maskable inter-
rupts.
10.2.1 Undefined Instruction Interrupt
10.2.2 Overflow Interrupt
10.2.3 BRK Interrupt
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B
Interrupt
Figure 10.1 shows types of interrupts.
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• Maskable Interrupt
• Non-maskable Interrupt
The undefined instruction interrupt occurs when the UND instruction is executed.
The overflow interrupt occurs when the O flag in the FLG register is set to "1" (overflow of arithmetic
operation) and the INTO instruction is executed.
Instructions to set the O flag are :
ABS, ADC, ADCF, ADD, ADDX, CMP, CMPX, DIV, DIVU, DIVX, NEG, RMPA, SBB, SCMPU, SHA, SUB, SUBX
The BRK interrupt occurs when the BRK instruction is executed.
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NOTES:
1
The I flag enables or disables an interrupt.
The interrupt priority order based on interrupt priority level can be changed.
The I flag does not enable nor disable an interrupt .
The interrupt priority order based on interrupt priority level cannot be changed.
3
0
1. The peripheral functions in the microcomputer are used to generate the peripheral interrupt.
2. Do not use this interrupt. For development support tools only.
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2
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0
Software
(Non-Maskable Interrupt)
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Hardware
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Special
(Non-Maskable Interrupt)
Peripheral Function
(Maskable Interrupt)
(1)
Undefined Instruction (UND Instruction)
Overflow (INTO Instruction)
BRK Instruction
BRK2 Instruction
INT Instruction
_______
NMI
Watchdog Timer
Oscillation Stop Detect
Single-Step
Address Match
DMACII
(2)
(2)
10. Interrupts