M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 382

IC M32C/83 MCU FLASH 100LQFP

M30833FJGP#U3

Manufacturer Part Number
M30833FJGP#U3
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30833FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
32 MHz
Operating Supply Voltage
5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
22.3 CAN Interrupts
e
E
3
. v
J
Figure 22.30 Operation Timing when CAN Bus Error Occurs
2
0
22.2.4 CAN Bus Error Timing
The CANj interrupt (j=0 to 2) is provided as the CAN interrupt. Figure 22.31 shows a block diagram of the
CAN interrupt.
The following factors cause the CAN-associated interrupt request to be generated.
C
1
9
3 .
B
8 /
Figure 22.30 shows an operation example of when a CAN bus error occurs.
The CANj interrupt, caused by one of the CANi interrupt request factors listed above, is generated via
the OR circuit.
If an interrupt request factor is established, the corresponding bit in the C0SISTR register is set to "1"
(interrupt requested) when the CAN0 slot k completes a transmission or a reception. The corresponding
bit in the C0EISTR register is set to "1" (interrupt requested) when the CANi module detects a bus error,
moves into an error-passive state, or moves into a bus-off state.
The CAN0 interrupt request signal is set to "1" when the corresponding bit in the C0SISTR or C0EISTR
is set to "1" and the corresponding bit in the C0SIMKR or C0EIMKR is set to "1".
When the CAN0 interrupt request signal changes from "0" to "1", all CANjR bits in the IIO9IR to IIO11IR
registers are set to "1" (interrupt requested).
If at least one of the CANjE bits in the IIO9IE to IIO11IE registers is set to "1" (interrupt enabled), the IR
bits in the corresponding CANjIC registers are set to "1" (interrupt requested). The CAN0 interrupt
request signal remains set to "1" if another interrupt request causes a corresponding bit in the C0SISTR
or C0EISTR to be set to "1" and the corresponding bit in the C0SIMKR or C0EIMKR to be set to "1" after
the CAN0 interrupt request signal changes "0" to "1". The CANjR and IR bits also remain unchanged.
Bits in the C0SISTR or C0EISTR register and CANjR bits (j=0 to 2) in the IIO9IR to IIO11IR registers are
not set to "0" automatically, interrupt acknowledgment notwithstanding. Set these bits to "0" by pro-
gram.
The CANi interrupts are acknowledged when the CANjR bit in the IIO9IR to IIO11IR register and the
corresponding bit in the C0SISTR or C0EISTR register, which are set to enable interrupts though setting
the C0SIMKR or C0EIMKR register, are set to "0". If these bits remain set to "1", all CAN-associated
interrupt request factors become invalid.
- The CAN0 slot i (i=0 to 15) completes a transmission
- The CAN0 slot i completes a reception
- The CAN0 module detects a bus error
- The CAN0 module moves into an error-passive state
- The CAN0 module moves into a bus-off state
0
1
3
0
(1) When a CAN bus error is detected, the STATE_BUSERROR bit in the CiSTR register is set to "1",
3
J
G
4
a
o r
0 -
n
(error occurred) and the BEIS bit in the CiEISTR register is set to "1" (interrupt requested). The
CAN starts transmitting the error frame.
3 .
1
u
, 1
3
p
1
(
2
M
0
0
3
6
2
C
8 /
Page 357
CAN bus
STATE_BUSERROR
bit
BEIS bit
, 3
M
3
2
C
f o
8 /
4
3
8
) T
8
"1"
"0"
"1"
"0"
Transmit / receive frame
(1)
Error detected
Error frame
22. CAN Module

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