HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 109

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.5
5.5.1
Exception processing can be triggered by trap instruction, illegal slot instructions, and general
illegal instructions, as shown in table 5.9.
Table 5.9
5.5.2
When a TRAPA instruction is executed, trap instruction exception processing starts. The CPU
operates as follows:
1. The status register (SR) is saved to the stack.
2. The program counter (PC) is saved to the stack. The PC value saved is the start address of the
3. The CPU reads the start address of the exception service routine from the exception processing
Type
Trap instruction
Illegal slot
instructions
General illegal
instructions
instruction to be executed after the TRAPA instruction.
vector table that corresponds to the vector number specified in the TRAPA instruction, jumps
to that address and starts excuting the program. This jump is not a delayed branch.
Exceptions Triggered by Instructions
Types of Exceptions Triggered by Instructions
Trap Instructions
Types of Exceptions Triggered by Instructions
Source Instruction
TRAPA
Undefined code placed
immediately after a delayed
branch instruction (delay slot) or
instructions that rewrite the PC
Undefined code anywhere
besides in a delay slot
Comment

Delayed branch instructions: JMP, JSR,
BRA, BSR, RTS, RTE, BF/S, BT/S, BSRF,
BRAF
Instructions that rewrite the PC: JMP, JSR,
BRA, BSR, RTS, RTE, BT, BF, TRAPA,
BF/S, BT/S, BSRF, BRAF

Rev. 2.00, 09/04, page 67 of 720