HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 557

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The pin function controller (PFC) is composed of those registers that are used to select
the functions of multiplexed pins and assign pins to be inputs or outputs. Tables 17.1 to
17.5 list the multiplexed pins.
Tables 17.6 and 17.7 list the pin functions in each operating mode.
Table 17.1 Multiplexed Pins (Port A)
Note:
Port
A
Function 1
(Related
Module)
PA0 I/O
(port)
PA1 I/O
(port)
PA2 I/O
(port)
PA3 I/O
(port)
PA4 I/O
(port)
PA5 I/O
(port)
PA6 I/O
(port)
PA7 I/O
(port)
PA8 I/O
(port)
PA9 I/O
(port)
PA10 I/O
(port)
PA11 I/O
(port)
PA12 I/O
(port)
PA13 I/O
(port)
PA14 I/O
(port)
PA15 I/O
(port)
*
F-ZTAT only
Section 17 Pin Function Controller (PFC)
Function 2
(Related
Module)






TCLKA
input (MTU)
TCLKB
input (MTU)
TCLKC
input (MTU)
TCLKD
input (MTU)
CS0 output
(BSC)

WRL output
(BSC)

RD output
(BSC)
CK output
(CPG)
Function 3
(Related
Module)








IRQ2 input
(INTC)
IRQ3 input
(INTC)
RD output
(BSC)
ADTRG
input (A/D)
UBCTRG
output
(UBC)*
POE4 input
(port)
POE5 input
(port)
POE6 input
(port)
Function 4
(Related
Module)


IRQ0 input
(INTC)


IRQ1 input
(INTC)
RD output
(BSC)
WAIT input
(BSC)








Function 5
(Related
Module)
A0 output
(BSC)
A1 output
(BSC)
A2 output
(BSC)
A3 output
(BSC)
A4 output
(BSC)
A5 output
(BSC)




TCK input
(H-UDI)*

TDI input
(H-UDI)*
TDO output
(H-UDI)*
TMS input
(H-UDI)*
TRST input
(H-UDI)*
Function 6
(Related
Module)
POE0 input
(port)
POE1 input
(port)
PCIO I/O
(MMT)
POE4 input
(port)
POE5 input
(port)
POE6 input
(port)
RXD2 input
(SCI)
TXD2 output
(SCI)
RXD3 input
(SCI)
TXD3 output
(SCI)
SCK2 I/O
(SCI)
SCK3 I/O
(SCI)

BREQ input
(BSC)

BACK
output
(BSC)
Rev. 2.00, 09/04, page 515 of 720
Function 7
(Related
Module)
RXD2 input
(SCI)
TXD2 output
(SCI)
SCK2 I/O
(SCI)
RXD3 input
(SCI)
TXD3 output
(SCI)
SCK3 I/O
(SCI)










Function 8
(Related
Module)















