ATMEGA16M1-AU Atmel, ATMEGA16M1-AU Datasheet - Page 143
ATMEGA16M1-AU
Manufacturer Part Number
ATMEGA16M1-AU
Description
IC MCU AVR 16K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16M1-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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17.9.1.2
17.9.1.3
8209D–AVR–11/10
Signal Polarity
Input Mode Operation
Figure 17-11. PSC Input Filtering
One can select the active edge (edge modes) or the active level (level modes) See PELEVnx bit
description in Section "PMICn – PSC Module n Input Control Register", page 150.
If PELEVnx bit set, the significant edge of PSCn Input A or B is rising (edge modes) or the active
level is high (level modes) and vice versa for unset/falling/low.
- In 2- or 4-ramp mode, PSCn Input A is taken into account only during Dead-Time0 and On-
Time0 period (respectively Dead-Time1 and On-Time1 for PSCn Input B)
- In 1-ramp-mode PSC Input A or PSC Input B act on the whole ramp
Thanks to 4 configuration bits (PRFM3:0), it’s possible to define the mode of the PSC inputs.
Table 17-5.
Note: All following examples are given with rising edge or high level active inputs.
PRFMn2:0
000b
001b
010b
011b
10x
11xb
PSC Input
Module X
CLK
PSC Input Mode Operation
Description
No action, PSC Input is ignored
Disactivate module n Outputs A
Disactivate module n Output B
Disactivate module n Output A & B
Disactivate all PSC Output
Halt PSC and Wait for Software Action
PSC
Digital
Filter
4 x CLK
PSC
ATmega16M1/32M1/64M1
Ouput
Stage
PSC Module n Input
PSCOUTnX
PIN
143
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