ATMEGA16M1-AU Atmel, ATMEGA16M1-AU Datasheet - Page 265

• Manufacturer Part Number: ATMEGA16M1-AU
• Description: IC MCU AVR 16K FLASH 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

24.4
24.4.1
24.5
24.5.1
8209D–AVR–11/10
Starting a Conversion
Register Description
DAC Voltage Reference
DACON – Digital to Analog Conversion Control Register
The DAC is configured thanks to the DACON register. As soon as the DAEN bit in DACON reg-
ister is set, the DAC converts the value present on the DACH and DACL registers in accordance
with the register DACON setting.
Alternatively, a conversion can be triggered automatically by various sources. Auto Triggering is
enabled by setting the DAC Auto Trigger Enable bit, DAATE in DACON. The trigger source is
selected by setting the DAC Trigger Select bits, DATS in DACON (See description of the DATS
bits for a list of the trigger sources). When a positive edge occurs on the selected trigger signal,
the DAC converts the value present on the DACH and DACL registers in accordance with the
register DACON setting. This provides a method of starting conversions at fixed intervals. If the
trigger signal is still set when the conversion completes, a new conversion will not be started. If
another positive edge occurs on the trigger signal during conversion, the edge will be ignored.
Note that an interrupt flag will be set even if the specific interrupt is disabled or the Global Inter-
rupt Enable bit in SREG is cleared. A conversion can thus be triggered without causing an
interrupt. However, the interrupt flag must be cleared in order to trigger a new conversion at the
next interrupt event.
The reference voltage for the ADC (V
be selected as either AV
AV
ated from the internal bandgap reference (V
external AREF pin is directly connected to the DAC, and the reference voltage can be made
more immune to noise by connecting a capacitor between the AREF pin and ground. V
also be measured at the AREF pin with a high impedant voltmeter. Note that V
impedant source, and only a capacitive load should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other
reference voltage options in the application, as they will be shorted to the external voltage. If no
external voltage is applied to the AREF pin, the user may switch between AV
reference selection. The first DAC conversion result after switching reference voltage source
may be inaccurate, and the user is advised to discard this result.
The DAC is controlled via three dedicated registers, the DACON register which is used for DAC
configuration, and the DACH and DACL which are used to set the value to be converted.
• Bit 7 – DAATE: DAC Auto Trigger Enable bit
Set this bit to update the DAC input value on the positive edge of the trigger signal selected with
the DACTS2-0 bit in DACON register.
Clear it to automatically update the DAC input when a value is written on DACH register.
Bit
Read/Write
Initial Value
CC
is connected to the DAC through a passive switch. The internal 2.56V reference is gener-
DAATE
R/W
7
0
CC
DATS2
R/W
6
0
, internal 2.56V reference, or external AREF pin.
DATS1
R/W
5
0
REF
) indicates the conversion range for the DAC. V
DATS0
R/W
BG
4
0
) through an internal amplifier. In either case, the
ATmega16M1/32M1/64M1
3
0
-
-
DALA
R/W
2
0
DAOE
R/W
1
0
DAEN
CC
R/W
0
0
and 2.56V as
REF
DACON
is a high
REF
REF
265
can
can