ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 344

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.4
Note:
344
Address
(0xBD)
(0xBC)
(0xAD)
(0xAC)
(0xBF)
(0xBE)
(0xBB)
(0xBA)
(0xB9)
(0xB8)
(0xB7)
(0xB6)
(0xB5)
(0xB4)
(0xB3)
(0xB2)
(0xB1)
(0xB0)
(0xAF)
(0xAE)
(0xAB)
(0xAA)
(0xA9)
(0xA8)
(0xA7)
(0xA6)
(0xA5)
(0xA4)
(0xA3)
(0xA2)
(0xA1)
(0xA0)
(0x9F)
Register Summary (Continued)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATA6602/ATA6603
ATA6602/ATA6603
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATA6602/ATA6603 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
TCCR2B
TCCR2A
TWAMR
OCR2B
OCR2A
TCNT2
TWCR
TWDR
TWSR
TWBR
TWAR
Name
ASSR
COM2A1
TWAM6
FOC2A
TWINT
TWS7
TWA6
Bit 7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
COM2A0
TWAM5
EXCLK
FOC2B
TWEA
TWA5
TWS6
Bit 6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
COM2B1
TWAM4
TWSTA
TWA4
TWS5
Bit 5
AS2
Timer/Counter2 Output Compare Register B
–
–
–
–
Timer/Counter2 Output Compare Register A
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
2-wire Serial Interface Bit Rate Register
2-wire Serial Interface Data Register
COM2B0
TCN2UB
TWAM3
TWSTO
Timer/Counter2 (8-bit)
TWS4
TWA3
Bit 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
OCR2AUB OCR2BUB
WGM22
TWAM2
TWWC
TWA2
TWS3
Bit 3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
TWAM1
TWEN
TWA1
CS22
Bit 2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
TCR2AUB
TWAM0
WGM21
TWPS1
TWA0
CS21
Bit 1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
TCR2BUB
TWGCE
WGM20
TWPS0
TWIE
CS20
Bit 0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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