ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 6

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
3.3.7
6
Functional Description
ATA6602/ATA6603
Supply Pin (VS)
Ground Pin (GND)
Undervoltage Reset Output (NRES)
Voltage Regulator Output Pin (VDD)
Voltage Regulator Sense Pin (PVDD)
Bus Pin (LIN)
Input/Output Pin (TXD)
The LIN operating voltage is V
Pre-normal mode and the voltage regulator is switched on (that is, 5V/50 mA output capability).
The supply current in Sleep mode is typically 10 µA, and 40 µA in Silent mode.
The IC is neutral on the LIN pin in case of GND disconnection; it can handle a ground shift up to
3V for supply voltage at the VS pin above 9V.
This push-pull output is supplied from the V
voltage detection threshold of V
except the IC is switched into Sleep mode. Even if V
internally driven from the V
then becomes highly resistant.
The implemented undervoltage delay keeps NRES low for t
normal value.
The internal 5V voltage regulator is capable of driving loads with up to 50 mA of current con-
sumption; it is able to supply the microcontroller and other ICs on the PCB. It is protected
against overloads by means of current limitation and overtemperature shutdown. Furthermore,
the output voltage is monitored and will cause a reset signal at the NRES output pin if the output
voltage drops below a defined threshold V
nal NPN transistor may be used with its base connected to the VDD pin and its emitter
connected to PVDD.
This is the sense input pin of the 5V voltage regulator. For normal applications (that is, when
only using the internal output transistor), this pin is connected to the VDD pin. If an external
boosting transistor is used, the PVDD pin must be connected to the output of this transistor, its
emitter terminal.
A low side driver with internal current limitation and thermal shutdown, and an internal pull-up
resistor in compliance with LIN specification 2.0 is implemented. This is a self-adapting current
limitation; that is, during current limitation, as the chip temperature increases, the current
decreases. The allowed voltage range is between –40V and +60V. Reverse currents from the
LIN bus to VS are suppressed, even in case of ground shifts or battery disconnection. LIN
receiver thresholds are compatible to the LIN protocol specification. The fall time from recessive
bus state to dominant, and the rise time from dominant bus state to recessive are slope
controlled.
This pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled
to ground in order to have the LIN bus low. If TXD is high, the LIN output transistor is turned off
and the bus is in the recessive state, pulled up by the internal resistor.
S
voltage. If V
thun
S
= 5V to 18V. After switching on VS, the IC starts with the
, NRES switches to low after t
S
thun
voltage ramps down, NRES stays until V
CC
. To boost up the maximum load current, an exter-
voltage. If the V
CC
= 0V the NRES stays low, because it is
Reset
CC
= 10 ms after V
voltage falls below the under-
res_f
(Figure 3-8 on page
4921E–AUTO–09/09
CC
S
reaches its
< 1.5V and
15)