ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 48

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5.4
4.5.4.1
4.5.4.2
4.5.4.3
4.5.4.4
48
ATA6602/ATA6603
I/O Memory
General Purpose I/O Registers
General Purpose I/O Register 2 – GPIOR2
General Purpose I/O Register 1 – GPIOR1
General Purpose I/O Register 0 – GPIOR0
The I/O space definition of the ATA6602/ATA6603 is shown in
342.
All ATA6602/ATA6603 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATA6602/ATA6603 is a
complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written. Some of the Status Flags are cleared
by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions
will only operate on the specified bit, and can therefore be used on registers containing such
Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. The I/O and
peripherals control registers are explained in later sections.
The ATA6602/ATA6603 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
Initial Value
Initial Value
Initial Value
Read/Write
Read/Write
Read/Write
Bit
Bit
Bit
MSB
MSB
MSB
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
“Register Summary” on page
R/W
R/W
R/W
1
0
1
0
1
0
LSB
LSB
R/W
LSB
R/W
R/W
0
0
0
0
0
0
4921E–AUTO–09/09
GPIOR2
GPIOR0
GPIOR1