LPC3141FET180,551 NXP Semiconductors, LPC3141FET180,551 Datasheet - Page 14

• Manufacturer Part Number: LPC3141FET180,551
• Description: IC ARM9 MCU USB OTG 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3141FET180,551

• Package / Case: 180-TFBGA
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 270MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, PWM, WDT
• Number Of I /o: 20
• Program Memory Type: ROMless
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJS
• Data Bus Width: 32 bit
• Data Ram Size: 192 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 270 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11037
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935289711551

NXP Semiconductors
LPC3141_3143
Preliminary data sheet
Fig 3.
(1) LPC3143 only.
4 GB
2 GB
LPC3141/3143 memory map
0 GB
6.2 Memory map
6.3 JTAG
MPMC configuration registers
NAND flash/AES buffer
external SDRAM bank 0
external SRAM bank 1
external SRAM bank 0
interrupt controller
LPC3141/3143
The Joint Test Action Group (JTAG) interface allows the incorporation of the
LPC3141/3143 in a JTAG scan chain.
This module has the following features:
MCI/SD/SDIO
128 kB ISROM
96 kB ISRAM1
96 kB ISRAM0
APB4 domain
APB3 domain
APB2 domain
APB1 domain
APB0 domain
shadow area
USB OTG
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
(1)
All information provided in this document is subject to legal disclaimers.
0x1700 0000
0x1600 0000
0x1500 0000
0x1200 0000
0x1105 8000
0x1104 0000
0x1102 8000
0x0000 1000
0x0000 0000
0xFFFF FFFF
0x8000 0000
0x7000 0800
0x7000 0000
0x6000 1000
0x6000 0000
0x4000 0000
0x3000 0000
0x2004 0000
0x2002 0000
0x2000 0000
0x1900 1000
0x1900 0000
0x1800 0900
0x1800 0000
0x1700 9000
0x1700 8000
0x1300 B000
0x1300 8000
0x1300 0000
0x1202 0000
Rev. 0.16 — 27 May 2010
APB4 domain
APB3 domain
APB2 domain
APB1 domain
APB0 domain
NAND flash controller
I
2
S system config
event router
IOCONFIG
SysCReg
reserved
reserved
reserved
I2SRX_1
I2SRX_0
I2STX_1
I2STX_0
ADC10B
reserved
timer 3
timer 2
timer 1
timer 0
LPC3141/3143
UART
PWM
WDT
DMA
PCM
RNG
CGU
LCD
I
I
OTP
SPI
2
2
C1
C0
0x1700 8000
0x1700 1000
0x1700 0800
0x1700 0000
0x1600 0280
0x1600 0200
0x1600 0180
0x1600 0100
0x1600 0080
0x1600 0000
0x1500 3000
0x1500 2000
0x1500 1000
0x1500 0800
0x1500 0400
0x1500 0000
0x1300 B000
0x1300 A400
0x1300 A000
0x1300 9000
0x1300 8C00
0x1300 8800
0x1300 8400
0x1300 8000
0x1300 6000
0x1300 5000
0x1300 4000
0x1300 3000
0x1300 2800
0x1300 2400
0x1300 2000
0x1300 0000
© NXP B.V. 2010. All rights reserved.
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