LPC3141FET180,551 NXP Semiconductors, LPC3141FET180,551 Datasheet - Page 6

• Manufacturer Part Number: LPC3141FET180,551
• Description: IC ARM9 MCU USB OTG 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3141FET180,551

• Package / Case: 180-TFBGA
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 270MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, PWM, WDT
• Number Of I /o: 20
• Program Memory Type: ROMless
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJS
• Data Bus Width: 32 bit
• Data Ram Size: 192 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 270 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM11037
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935289711551

NXP Semiconductors
Table 3.
Table 4.
Pin names with prefix m are multiplexed pins. See
LPC3141_3143
Preliminary data sheet
Pin Symbol
Row P
1
5
9
13
Pin name
Clock Generation Unit (CGU)
FFAST_IN
FFAST_OUT
VDDA12
VSSA12
RSTIN_N
CLK_256FS_O
CLOCK_OUT
SYSCLK_O
10-bit ADC
ADC10B_VDDA33
ADC10B_GNDA
ADC10B_GPA0
ADC10B_GPA1
ADC10B_GPA2
ADC10B_GPA3
USB HS 2.0 OTG
USB_VBUS
USB_ID
USB_RREF
USB_DP
USB_VDDA33
mLCD_DB_7
mLCD_DB_1
TRST_N
Pin allocation table
Pin description
[4]
BGA
Ball
A10
B10
D11;
E10
E9
H14
H12
J4
G13
A13
A12
B14
A14
B13
C14
L2
M1
J5
P2
Pin Symbol
2
6
10
14
…continued
Digital
I/O
level
[1]
SUP1
SUP1
SUP1
-
SUP3
SUP3
SUP4
SUP3
SUP3
-
SUP3
SUP3
SUP3
SUP3
SUP5
SUP3
SUP3
SUP3
USB_DP
mLCD_DB_3
TMS
mUART_RTS_N
All information provided in this document is subject to legal disclaimers.
Application
function
AI
AO
Supply
Ground
DI
DO
DO
DO
Supply
Ground
AI
AI
AI
AI
AI
AI
AIO
AIO
Rev. 0.16 — 27 May 2010
Table 10
Pin
state
after
reset
-
-
-
-
I:PU
O
O
O
-
-
-
-
-
-
-
-
-
-
for pin function selection of multiplexed pins.
Pin Symbol
3
7
11
-
[2]
Cell type
[3]
AIO2
AIO2
PS3
CG1
DIO2
DIO1
DIO4
DIO1
PS3
CG1
AIO1
AIO1
AIO1
AIO1
AIO3
AIO1
AIO1
AIO1
mLCD_DB_14
mLCD_DB_5
I2SRX_WS0
-
Description
12 MHz oscillator clock input.
12 MHz oscillator clock output.
12 MHz oscillator/PLLs analog supply.
12 MHz oscillator/PLLs analog ground.
System Reset Input (active LOW).
Programmable clock output; fractionally
derived from CLK1024FS_BASE clock
domain. Generally used for external audio
codec master clock.
Programmable clock output; fractionally
derived from SYS_BASE clock domain.
Programmable clock output. Output one of
seven base/reference input clocks. No
fractional divider.
10-bit ADC analog supply.
10-bit ADC analog ground.
10-bit ADC analog input.
10-bit ADC analog input.
10-bit ADC analog input.
10-bit ADC analog input.
USB supply detection line.
Indicates to the USB transceiver whether in
device (USB_ID HIGH) or host (USB_ID
LOW) mode (contains internal pull-up
resistor).
USB connection for external reference
resistor (12 kΩ ± 1%) to analog ground
supply.
USB D+ connection with integrated 45 Ω
termination resistor.
LPC3141/3143
Pin Symbol
4
8
12
-
mLCD_DB_13
mLCD_RS
UART_RXD
-
© NXP B.V. 2010. All rights reserved.
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