LPC3141FET180,551 NXP Semiconductors, LPC3141FET180,551 Datasheet - Page 34

IC ARM9 MCU USB OTG 180TFBGA

LPC3141FET180,551

Manufacturer Part Number
LPC3141FET180,551
Description
IC ARM9 MCU USB OTG 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC3000r
Datasheet

Specifications of LPC3141FET180,551

Package / Case
180-TFBGA
Core Processor
ARM9
Core Size
32-Bit
Speed
270MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, PCM, SPI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, PWM, WDT
Number Of I /o
20
Program Memory Type
ROMless
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC31
Core
ARM926EJS
Data Bus Width
32 bit
Data Ram Size
192 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
270 MHz
Number Of Timers
5
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
OM11037
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935289711551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC3141FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 10.
LPC3141_3143
Preliminary data sheet
Pin Name
NAND related pin multiplexing
mNAND_RYBN0 NAND_RYBN0 MCI_DAT_4
mNAND_RYBN1 NAND_RYBN1 MCI_DAT_5
mNAND_RYBN2 NAND_RYBN2 MCI_DAT_6
mNAND_RYBN3 NAND_RYBN3 MCI_DAT_7
Audio related pin multiplexing
mI2STX_DATA0 I2STX_DATA0
mI2STX_BCK0
mI2STX_WS0
mI2STX_CLK0
UART related pin multiplexing
mUART_CTS_N UART_CTS_N SPI_CS_OUT1
mUART_RTS_N UART_RTS_N SPI_CS_OUT2
Pin descriptions of multiplexed pins
6.28.2 Multiplexing between LCD and MPMC
Default Signal Alternate Signal Description
I2STX_BCK0
I2STX_WS0
I2STX_CLK0
The multiplexing between the LCD interface and MPMC allows for the following two
modes of operation:
The external NAND flash is accessible in both modes.
The block diagram
involved in the pin interface multiplexing between the EBI, NAND flash controller, MPMC,
and RAM-based LCD interface.
MPMC-mode: SDRAM and bus-based LCD or SRAM
LCD-mode: Dedicated LCD interface
PCM_DA
PCM_FSC
PCM_DCLK
PCM_DB
All information provided in this document is subject to legal disclaimers.
Figure 9
Rev. 0.16 — 27 May 2010
NAND_RYBN0 — NAND flash controller Read/Not busy signal 0.
MCI_DAT_4 — MCI card data input/output line 4.
NAND_RYBN1 — NAND flash controller Read/Not busy signal 1.
MCI_DAT_5 — MCI card data input/output line 5.
NAND_RYBN2 — NAND flash controller Read/Not busy signal 2
MCI_DAT_6 — MCI card data input/output line 6.
NAND_RYBN3 — NAND flash controller Read/Not busy signal 3.
MCI_DAT_7 — MCI card data input/output line 7.
I2STX_DATA0 — I2S interface 0 transmit data signal.
PCM_DA — PCM serial data line A.
I2STX_BCK0 — I2S interface 0 transmit bit clock signal.
PCM_FSC — PCM frame synchronization signal.
I2STX_WS0 — I2S interface 0 transmit word select signal.
PCM_DCLK — PCM data clock output.
I2STX_CLK0 — I2S interface 0 transmit clock signal.
PCM_DB — PCM serial data line B.
UART_CTS_N — UART modem control Clear-to-send signal.
SPI_CS_OUT1 — SPI chip select out for slave 1 (used in master
mode).
UART_RTS_N — UART modem control Request-to-Send signal.
SPI_CS_OUT2 — SPI chip select out for slave 2 (used in master
mode).
gives a high level overview of the modules in the chip that are
LPC3141/3143
© NXP B.V. 2010. All rights reserved.
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