ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 174

IC MCU 8BIT 8K FLASH 32LQFP

ST7FLITE49K2T6TR

Manufacturer Part Number
ST7FLITE49K2T6TR
Description
IC MCU 8BIT 8K FLASH 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE49K2T6TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FLITE4x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
For Use With
497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE49K2T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST7FLITE49K2T6TR
Manufacturer:
ST
0
On-chip peripherals
11.7.6
174/245
Register description
Control/status register (ADCCSR)
Reset value: 0000 0000 (00h)
Bit 7 = EOC End of conversion bit
Bit 6 = SPEED ADC clock selection bit
Bit 5 = ADON A/D converter ON bit
Bit 4 = Reserved, must be kept cleared.
Bits 3:0 = CH[3:0] Channel selection
Table 55.
1. The number of channels is device dependent. Refer to the device pinout description.
Read only
EOC
This bit is set by hardware. It is cleared by hardware when software reads the ADCDRH
register or writes to any bit of the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
This bit is set and cleared by software. It is used together with the SLOW bit to
configure the ADC clock speed. Refer to the table in the SLOW bit description
(ADCDRL register).
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
These bits select the analog input to convert. They are set and cleared by software.
7
Channel selection using CH[3:0]
Channel pin
SPEED
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
(1)
ADON
0
CH3
Read/write
0
0
0
0
0
0
0
0
1
1
CH3
CH2
0
0
0
0
1
1
1
1
0
0
CH2
CH1
CH1
0
0
1
1
0
0
1
1
0
0
ST7LITE49K2
CH0
CH0
0
1
0
1
0
1
0
1
0
1
0

Related parts for ST7FLITE49K2T6TR