ST7FLITE49K2T6 STMicroelectronics, ST7FLITE49K2T6 Datasheet - Page 173

• Manufacturer Part Number: ST7FLITE49K2T6
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE49K2
11.7.4
11.7.5
Configuring the A/D conversion
The analog input ports must be configured as input, no pull-up, no interrupt (see
I/O
as a logic input.
To assign the analog channel to convert, select the CH[2:0] bits in the ADCCSR register.
Set the ADON bit to enable the A/D converter and to start the conversion. From this time on,
the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
●
●
A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
2.
3.
To read only 8 bits, perform the following steps:
1.
2.
Changing the conversion channel
The application can change channels during conversion. When software modifies the
CH[3:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is
cleared, and the A/D converter starts converting the newly selected channel.
Low power modes
The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced
power consumption when no conversion is needed and between single shot conversions.
Table 54.
Interrupts
None.
ports). Using these pins as analog inputs does not affect the ability of the port to be read
The EOC bit is set by hardware.
The result is in the ADCDR registers.
Poll the EOC bit
Read ADCDRL
Read ADCDRH. This clears EOC automatically.
Poll EOC bit
Read ADCDRH. This clears EOC automatically.
Mode
Wait
Halt
Effect of low power modes on the A/D converter
After wakeup from Halt mode, the A/D Converter requires a stabilization time
t
STAB
(see Electrical Characteristics) before accurate conversions can be
No effect on A/D Converter
A/D Converter disabled.
Description
performed.
On-chip peripherals
Section 10:
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