ST72F264G2B6 STMicroelectronics, ST72F264G2B6 Datasheet - Page 176

• Manufacturer Part Number: ST72F264G2B6
• Description: MCU 8-BIT 8K FLASH 32-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F264G2B6

• Mfg Application Notes: ST7 Checksum Capability, AN1070 App Note
• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Processor Series: ST72F2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• For Use With: 497-6423 - BOARD EVAL BASED ON ST72264G1497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5570

Function Descriptions
Table 120. LART_ConfigureOCMP
Note: Take care of the ATR value while using this function.
176/235
Function Name
Function Prototype
Behaviour Description
Input Parameter 1
Input Parameter 2
Output Parameters
Required Preconditions
Functions called
Postconditions
See also
1) Feature available only for ST7FLite1, ST7FLite2, ST7FLite3 and ST7DALI devices
LART_ConfigureOCMP
Void LART_ConfigureOCMP( Lart_OCMPChannel OCM-
PChannel, unsigned int Dutycycle_Data)
Puts timer in Output Compare mode. This mode disables
PWM output.
OCMPChannel
LART_OCMP0
OCMP0 is configured
LART_OCMP1
OCMP1 is configured
LART_OCMP2
OCMP2 is configured
LART_OCMP3
OCMP3 is configured
Dutycycle_Data
Data to be loaded in Duty cycle register (0x000 to 0xFFF)
which will be compared with upcounter.
None
LART_Init must have been called to select the counter
clock.
None
When the upcounter value reaches the Dutycycle_Data,
the CMPFxflag is set and an interrupt is generated if com-
pare interrupt is enabled.
LART_Init, LART_OCMP_Mode
1)
1)
1)