R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 206

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.50
Timer RD Function Control Register
b7 b6 b5 b4
NOTES:
1
1.
2. When bits CMD1 to CMD0 are set to 00b (timer mode, PWM mode, or PWM3 mode), the setting of the PWM3 bit is
Set bits CMD1 to CMD0 w hen both the TSTART0 and TSTART1 bits in the TRDSTR register are set to 0 (count stops).
enabled.
b3 b2
TRDFCR Register in Output Compare Function
b1 b0
0 0
Bit Symbol
TRDFCR
ADTRG
Symbol
STCLK
ADEG
PWM3
CMD0
CMD1
OLS0
OLS1
Page 188 of 458
Combination mode selection bit
Normal-phase output level selection
bit (in reset synchronous PWM mode
or complementary PWM mode)
Counter-phase output level selection
bit (in reset synchronous PWM mode
or complementary PWM mode)
A/D trigger enable bit
(in complementary PWM mode)
A/D trigger edge selection bit
(in complementary PWM mode)
External clock input selection bit
PWM3 mode selection bit
Address
Bit Name
013Ah
(2)
(1)
Set to 00b (timer mode, PWM mode, or
PWM3 mode) in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
This bit is disabled in the output compare
function.
0 : External clock input disabled
1 : External clock input enabled
Set this bit to 1 (other than PWM3 mode) in
the output compare function.
After Reset
10000000b
Function
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW