R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 217

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 14.62
Figure 14.62 lists the Operating Example When TRDGRCi Register is Used for Output Control of TRDIOAi
Pin and TRDGRDi Register is Used for Output Control of TRDIOBi Pin.
TRDSRi register
TRDSRi register
TRDSRi register
TRDSRi register
TRDIOAi output
TRDIOBi output
The above applies to the following conditions:
The CSELi bit in the TRDSTR register is set to 1. (The TRDi register is not stopped by the compare match.)
The BFCi and BFDi bits in the TRDMR register are set to 0. (The TRDGRCi and TRDGRDi registers are not used as the buffer register.)
The EAi and EBi bits in the TRDOER1 register are set to 0. (Enable TRDIOAi and TRDIOBi pin outputs.)
The CCLR2 to CCLR0 bits in the TRDCRi register are set to 001b. (Set the TRDi register to 0000h by the compare match in the TRDGRAi register.)
The TOAi and TOBi bits in the TRDOCR register are set to 0. (initial output “L” to the compare match.)
The IOA2 to IOA0 bits in the TRDIORAi register are set to 011b. (TRDIOAi output inversed at the TRDGRAi register compare match.)
The IOB2 to IOB0 bits in the TRDIORAi register are set to 011b. (TRDIOBi output inversed at the TRDGRBi register compare match.)
The IOC3 to IOC0 bits in the TRDIORCi register are set to 0011b. (TRDIOAi output inversed at the TRDGRCi register compare match.)
The IOD3 to IOD0 bits in the TRDIORCi register are set to 0011b. (TRDIOBi output inversed at the TRDGRDi register compare match.)
i = 0 or 1
IMFC bit in
IMFD bit in
IMFA bit in
IMFB bit in
Count source
Value in TRDi register
Operating Example When TRDGRCi Register is Used for Output Control of TRDIOAi
Pin and TRDGRDi Register is Used for Output Control of TRDIOBi Pin
FFFFh
0000h
Initial output “L”
1
0
1
0
Initial output “L”
1
0
1
0
m
n
p
q
Page 199 of 458
Output inversed by compare match
Set to 0 by a program
Output inversed by compare match
Set to 0 by a program
q + 1
p + 1
n + 1
p - q
m + 1
Set to 0 by a program
m: Setting Value in TRDGRAi register
n: Setting Value in TRDGRCi register
p: Setting Value in TRDGRBi register
q: Setting Value in TRDGRDi register
Set to 0 by a program
m - n
14. Timers