R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 80

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
8.
8.1
Figure 8.1
Figure 8.2
Table 8.1
Single-chip mode
Processor Mode Register 0
Processor Mode Register 1
Single-chip mode can be selected as processor mode.
Table 8.1 lists Features of Processor Mode. Figure 8.1 shows the PM0 Register and Figure 8.2 shows the PM1
Register.
b7 b6 b5 b4 b3 b2
NOTE:
b7 b6 b5 b4 b3 b2
NOTES :
0
Processor Mode
1.
1.
2.
Processor Mode
Processor Modes
Set the PRC1 bit in the PRCR register to 1 (enables w riting) before rew riting to the PM0 register.
Set the PRC1 bit in the PRCR register to 1 (enables w riting) before rew riting to the PM1 register.
The PM12 bit is set to 1 by a program (it remains unchanged even if it is set to 0).
When the CSPRO bit in the CSPR register is set to 1 (selects count source protect mode), the PM12 bit is
automatically set to 1.
0
PM0 Register
PM1 Register
Features of Processor Mode
b1 b0
b1 b0
0 0
0 0
Bit Symbol
Bit Symbol
(b2-b0)
(b7-b4)
(b1-b0)
(b6-b3)
Symbol
Symbol
PM03
PM12
Page 62 of 458
PM0
PM1
(b7)
(1)
(1)
SFR, internal RAM, internal ROM All pins are I/O ports or peripheral
Reserved bits
Softw are reset bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Reserved bits
WDT interrupt/reset sw itch bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Reserved bit
Accessible Areas
Address
Bit Name
Address
Bit Name
0004h
0005h
Set to 0
The MCU is reset w hen this bit is set to 1.
When read, its content is 0.
Set to 0
0 : Watchdog timer interrupt
1 : Watchdog timer reset
Set to 0
function I/O pins
Pins Assignable as I/O Port Pins
After Reset
After Reset
Function
Function
00h
00h
(2)
8. Processor Mode
RW
RW
RW
RW
RW
RW
RW

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