R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 303

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 16.2
SS Control Register H
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
3.
The set clock is used w hen the internal clock is selected.
The SSCK pin functions as the transfer clock output pin w hen the MSS bit is set to 1 (operates as master device).
The MSS bit is set to 0 (operates as slave device) w hen the CE bit in the SSSR register is set to 1 (conflict error
occurs).
The RSSTP bit is disabled w hen the MSS bit is set to 0 (operates as slave device).
SSCRH Register
Bit Symbol
(b4-b3)
Symbol
SSCRH
RSSTP
CKS0
CKS1
CKS2
Page 285 of 458
MSS
(b7)
Transfer clock rate select bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Master/slave device select bit
Receive single stop bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
00B8h
(3)
(1)
(2)
b2 b1 b0
0 0 0 : f1/256
0 0 1 : f1/128
0 1 0 : f1/64
0 1 1 : f1/32
1 0 0 : f1/16
1 0 1 : f1/8
1 1 0 : f1/4
1 1 1 : Do not set
0 : Operates as slave device
1 : Operates as master device
0 : Maintains receive operation after
1 : Completes receive operation after
receiving 1-byte data
receiving 1-byte data
16. Clock Synchronous Serial Interface
After Reset
Function
00h
RW
RW
RW
RW
RW
RW

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