HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 290

MCU 5V 0K I-TEMP PB-FREE 112-QFP

HD6417034AFI20V

Manufacturer Part Number
HD6417034AFI20V
Description
MCU 5V 0K I-TEMP PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417034AFI20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417034AFI20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
Rev. 7.00 Jan 31, 2006 page 262 of 658
REJ09B0272-0700
match signal
Compare match output timing
The compare match signal is generated in the last state in which TCNT and the general register
match (when TCNT changes from the matching value to the next value). When a compare
match signal is generated, the output value set in TIOR is output to the output compare pin
(TIOCA, TIOCB). Accordingly, when TCNT matches a general register, the compare match
signal is not generated until the next counter clock pulse. Figure 10.22 shows the output timing
of the compare match signal.
TCNT input
TIOCB
TIOCA
Compare
TCNT value
GRB
GRA
TIOCA
TIOCB
TCNT
clock
GR
CK
Figure 10.22 Compare Match Signal Output Timing
Figure 10.21 Example of Toggle Output
N
N
Counter cleared at
GRB compare match
N – 1
Time
Toggle
output
Toggle
output

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