HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 410

• Manufacturer Part Number: HD6417034AFI20V
• Description: MCU 5V 0K I-TEMP PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 13 Serial Communication Interface (SCI)
Transmitting Serial Data (Asynchronous Mode): Figure 13.5 shows a sample flowchart for
transmitting serial data. The procedure for transmitting serial data is as follows:
1. SCI initialization: select the TxD pin function with the PFC.
2. SCI status check and transmit data write: read the serial status register (SSR), check that the
3. To continue transmitting serial data: read the TDRE bit to check whether it is safe to write (1);
4.
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TDRE bit is 1, then write transmit data in the transmit data register (TDR) and clear TDRE to
0.
if so, write data in TDR, then clear TDRE to 0. When the DMAC is started by a transmit-data-
empty interrupt request (TXI) to write data in TDR, the TDRE bit is checked and cleared
automatically.
To output a break signal at the end of serial transmission: set the DR bit to 0, then clear TE to
0 in SCR and set the TxD pin function as output port with the PFC.
Figure 13.4 Sample Flowchart for SCI Initialization
Select communication format in SMR
Set TE or RE to 1 in SCR; Set RIE,
TIE, TEIE, and MPIE as necessary
Clear TE and RE bits to 0 in SCR
Set CKE1 and CKE0 bits in SCR
(leaving TE and RE cleared to 0)
1-bit interval elapsed?
Start of initialization
Set value in BRR
End
Yes
Wait
No
(1)
(2)
(3)
(4)