HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 185

IC H8 MCU FLASH 128K 100QFP

HD64F3048F16

Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of HD64F3048F16

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3048F16
Manufacturer:
RENESAS
Quantity:
1
Part Number:
HD64F3048F16
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3048F16
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD64F3048F16
Manufacturer:
RENESAS
Quantity:
20 000
Part Number:
HD64F3048F16V
Manufacturer:
SIEMENS
Quantity:
200
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS
Quantity:
3 477
Part Number:
HD64F3048F16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
DDR Write Timing
Data written to a data direction register (DDR) to change a CS
input, or vice versa, takes effect starting from the T
shows the timing when the CS
BRCR Write Timing
Data written to switch between A
starting from the T
changed from generic input to A
Address
bus
CS
Address
bus
A
23
1
to A
21
3
state of the BRCR write cycle. Figure 6.22 shows the timing when a pin is
High-impedance
1
Figure 6.22 BRCR Write Timing
pin is changed from generic input to CS
Figure 6.21 DDR Write Timing
23
23
, A
, A
22
22
, or A
, or A
T
T
High-impedance
1
1
21
21
output.
output and generic input or output takes effect
P8DDR address
3
BRCR address
state of the DDR write cycle. Figure 6.21
T
T
Rev. 3.00 Sep 27, 2006 page 157 of 872
2
2
n
pin from CS
1
T
T
output.
3
3
Section 6 Bus Controller
n
output to generic
REJ09B0325-0300

Related parts for HD64F3048F16