HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 207

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
24
23
22
21
20
19
18
17
16
Bit
Name
IWRWS1
IWRWS0
IWRRD1
IWRRD0
IWRRS1
IWRRS0
Initial
Value
0
1
1
0
1
1
0
1
1
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should always be
0.
Idle Cycles for Read-write in the Same Space
Specify the number of idle cycles to be inserted after the
access to a memory that is connected to the space. The
target cycle is a read-write cycle of which continuous
accesses are for the same space.
00: Setting prohibited.
01: 2 idle cycles inserted
10: 3 idle cycles inserted
11: 5 idle cycles inserted
Reserved
This bit is always read as 0. The write value should always be
0.
Idle Cycles for Read-read in Another Space
Specify the number of idle cycles to be inserted after the
access to a memory that is connected to the space. The
target cycle is a read-read cycle of which continuous
accesses switch between different space.
00: 1 idle cycle inserted
01: 2 idle cycles inserted
10: 3 idle cycles inserted
11: 5 idle cycles inserted
Reserved
This bit is always read as 0. The write value should always be
0.
Idle Cycles for Read-read in the Same Space
Specify the number of idle cycles to be inserted after the
access to a memory that is connected to the space. The
target cycle is a read-read cycle of which continuous
accesses are for the same space.
00: No idle cycle inserted
01: 1 idle cycle inserted
10: 2 idle cycles inserted
11: 4 idle cycles inserted
Rev. 2.00, 09/03, page 159 of 690