DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 614
DF2345TE20
Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2345TE20V.pdf
(929 pages)
Specifications of DF2345TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20
HD64F2345TE20
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
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Part Number:
DF2345TE20V
Manufacturer:
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Section 17 ROM
The error protect function has no effect on illegal operations unrelated to the setting conditions for
the FLER bit. Also, if a significant amount of time has elapsed before the transition to the protect
status, there is a possibility that the data in flash memory may already have become corrupted.
Consequently, this function is not able to provide complete protection against corruption of the
data in flash memory.
For this reason, it is necessary to run program and erase algorithms correctly while flash write
enable (FWE) is being applied and to monitor the internal operation of the microcomputer for
abnormalities using a watchdog timer, or the like, in order to prevent illegal operations of the sort
mentioned above. Also, at the point when the transition is made to the protect mode, in some cases
the flash memory may be in an erroneously programmed or erased status, or the programming or
erasing may be incomplete due to a forced shutdown. In such a case, make sure to force a recovery
Rev. 4.00 Feb 15, 2006 page 588 of 900
REJ09B0291-0400
Legend:
RD: Memory read possible
VF:
PR: Programming possible
ER: Erasing possible
RD VF PR ER FLER = 0
Normal operating mode
Verify-read possible
Program mode
Erase mode
occurrence
RD VF PR ER FLER = 1
Error protection mode
Error
P = 1 or
E = 1
Figure 17.23 Flash Memory State Transitions
P = 0 and
E = 0
Error occurrence
(software standby)
RD VF PR ER FLER = 0
RD: Memory read not possible
VF:
PR: Programming not possible
ER: Erasing not possible
RES = 0 or STBY = 0
read verify mode
Software
standby mode
Software standby
mode release
Verify-read not possible
Memory
Reset release and
hardware standby release
and software standby release
RES = 0 or
STBY = 0
RES = 0 or
FLMCR1, FLMCR2 (except FLER
bit), EBR1, EBR2 initialization state
RD VF PR ER FLER = 1
STBY = 0
Error protection mode
(software standby)
Reset or hardware standby
RD VF PR ER FLER = 0
RES = 0 or STBY = 0
(hardware protection)
or software standby
FLMCR1, FLMCR2,
EBR1, EBR2
initialization state
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