DF2166VTE33 Renesas Electronics America, DF2166VTE33 Datasheet - Page 249

• Manufacturer Part Number: DF2166VTE33
• Description: MCU FLASH 3V 512K 33MHZ 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

8.6.6
P6NCMC controls whether 1 or 0 is expected for the input signal to port 6 in bit units.
8.6.7
P6NCCS controls the sampling cycles of the noise canceler.
Bit
7
6
5
4
3
2
1
0
Bit
7 to 3 
2
1
0
Bit Name
P67NCMC
P66NCMC
P65NCMC
P64NCMC
P63NCMC
P62NCMC
P61NCMC
P60NCMC
Bit Name
NCCK2
NCCK1
NCCK0
Noise Canceler Mode Control Register (P6NCMC)
Noise Canceler Cycle Setting Register (P6NCCS)
Initial Value
Initial Value
All undefined
1
1
1
1
1
1
1
1
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
In 16 bit bus mode in extended mode:
Port 6 operates as the data pin (D7 to D0).
In other mode:
1 expected: 1 is stored in the port data register while 1
is input stably
0 expected: 0 is stored in the port data register while 0
is input stably
Description
Reserved. The read data is undefined. The initial
value should not be changed.
These bits set the sampling cycles of the noise
canceler.
000:
001:
010:
011:
100:
101:
110:
111:
0.06 µs
0.97 µs
15.5 µs
248.2 µs
993.0 µs
2.0 ms
4.0 ms
7.9 ms
Rev. 3.00, 03/04, page 207 of 830
φ/2
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φ/8192
φ/32768
φ/65536
φ/131072
φ/262144