DF2166VTE33 Renesas Electronics America, DF2166VTE33 Datasheet - Page 542

MCU FLASH 3V 512K 33MHZ 144TQFP

DF2166VTE33

Manufacturer Part Number
DF2166VTE33
Description
MCU FLASH 3V 512K 33MHZ 144TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Note: This restriction on usage can be canceled by setting the FNC1 and FNC0 bits to B′11 in
8. Notes on start condition issuance for retransmission
Rev. 3.00, 03/04, page 500 of 830
Internal clock
Figure 15.30 shows the timing of start condition issuance for retransmission, and the timing for
subsequently writing data to ICDR, together with the corresponding flowchart. Write the
transmit data to ICDR after the start condition for retransmission is issued and then the start
condition is actually generated.
BBSY bit
ICXR.
SDA
SCL
Master receive mode
Bit 0
8
Figure 15.29 Notes on Reading Master Receive Data
(write 0 to BBSY and SCP)
for issuing stop condition
Execution of instruction
A
9
disabled period
ICDR read
Confirmation of stop
condition issuance
(read BBSY = 0)
Stop condition
(a)
Start condition
issuance
Start condition

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