HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 372

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 12 Bus State Controller (BSC)
12.2.10 Refresh Time Constant Register (RTCOR)
The refresh time constant register (RTCOR) is a 16-bit read/write register. The values of RTCOR
and RTCNT (bottom 8 bits) are constantly compared. When the values match, the compare match
flag (CMF) of RTCSR is set and RTCNT is cleared to 0. When the refresh bit (RFSH) of the
individual memory control register (MCR) is set to 1 and the refresh mode is set to CAS-before-
RAS refresh, a memory refresh cycle occurs when the CMF bit is set. RTCOR is initialized to
H'00 by a power-on reset. It is not initialized by a manual reset or standby mode, but holds its
contents. Make the RTCOR setting before setting bits CKS2 to CKS0 in RTCSR.
Note: Writing to the RTCOR differs from that to general registers to ensure the RTCOR is not
12.2.11 Refresh Count Register (RFCR)
The refresh count register (RFCR) is a 16-bit read/write register. It is a 10-bit counter that
increments every time RTCOR and RTCNT match. When RFCR exceeds the count limit value set
in the LMTS of RTCSR, RTCSR's OVF bit is set and RFCR clears. RFCR is initialized to H'0000
when a power-on reset is performed. It is not initialized by a manual reset or standby mode, but
holds its contents.
Note: Writing to the RFCR differs from that to general registers to ensure the RFCR is not
Rev.6.00 Mar. 27, 2009 Page 314 of 1036
REJ09B0254-0600
Initial value:
Initial value:
R/W:
R/W:
rewritten incorrectly. Use the word-transfer instruction to set the upper byte as
B'10100101 and the lower byte as the write data. For details, see section 12.2.12, Cautions
on Accessing Refresh Control Related Registers.
Bit:
rewritten incorrectly. Use the word-transfer instruction to set the MSB and followed six
bits of upper bytes as B'101001 and remaining bits as the write data. For details, see
section 12.2.12, Cautions on Accessing Refresh Control Related Registers.
Bit:
15
15
—
—
0
0
14
14
—
—
0
0
13
13
—
—
0
0
12
12
—
—
0
0
11
11
—
—
0
0
10
—
10
—
0
0
R/W
—
9
0
9
0
R/W
—
0
0
8
8
R/W
R/W
7
0
7
0
R/W
R/W
0
0
6
6
R/W
R/W
5
0
5
0
R/W
R/W
0
0
4
4
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0