HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 789

MPU 3V 16K PB-FREE 240-QFP

HD6417727F160V

Manufacturer Part Number
HD6417727F160V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F160V
Manufacturer:
HITACHI
Quantity:
9
Part Number:
HD6417727F160V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417727F160V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Register: HcControl
Bits
3
2
1, 0
Reset
0b
0b
00b
R/W
R/W
R/W
R/W
Offset: 04–07
Description
IsochronousEnable (IE)
This bit is used by HCD to enable/disable the processing of
isochronous ED. While processing the periodic list, HC will
check the status of this bit when it finds an isochronous ED (F
=1). If set (enabled), the host controller continues to process
ED. If cleared (disabled), the host controller stops the
processing of the periodic list (currently includes only
isochronous ED) and starts to process the bulk/control list.
Setting this bit is guaranteed to be valid in the next frame (not in
the current frame).
0: Processes ED. (initial value)
1: Processes the bulk/control list.
PeriodicListEnable (PLE)
This bit is set to enable the processing of the periodic list. If
cleared by HCD, no periodic list processing is carried out after
next SOF. HC must check this bit before HC starts to process
the list.
0: The periodic list processing is not carried out after next SOF.
1: The periodic list processing is carried out after next SOF.
ControlBulkServiceRatio (CBSR)
This bit specifies the service ration of the control and bulk ED.
The host controller must compare the ratio specified by the
internal calculation whether it has processed several non-
vacant control ED in determining whether another control ED is
continued to be supplied or switched to bulk ED before any a
periodic list is processed. In case of reset, HCD is responsible
for restoring this value.
00: 1:1 (initial value)
01: 2:1
10: 3:1
11: 4:1
(initial value)
Rev.6.00 Mar. 27, 2009 Page 731 of 1036
Section 24 USB HOST Module
REJ09B0254-0600

Related parts for HD6417727F160V