UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 213
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UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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5.11 SRAM Connection Examples
shown below.
Examples of connecting the V850ES/JG3-L to SRAM in separate mode using the following configurations are
• Connecting an SRAM with an 8-bit data bus to the V850ES/JG3-L via an 8-bit bus
• Connecting two SRAMs with an 8-bit data bus to the V850ES/JG3-L via a 16-bit bus
• Connecting an SRAM with a 16-bit data bus to the V850ES/JG3-L via a 16-bit bus
Figure 5-17. Connecting Two SRAMs with 8-bit Data Bus to V850ES/JG3-L via 16-bit Bus
Note Generate the chip select signal using the higher address.
Note Generate the chip select signal using the higher address.
Figure 5-16. Connecting SRAM with 8-bit Data Bus to V850ES/JG3-L via 8-bit Bus
V850ES/JG3-L
V850ES/JG3-L
AD8 to AD15
AD0 to AD7
AD0 to AD7
A1 to A18
A0 to A17
A19
A18
WR1
WR0
WR0
RD
Note
RD
Note
CHAPTER 5 BUS CONTROL FUNCTION
Damping
Damping
Damping
Damping
Damping
resistor
resistor
resistor
resistor
resistor
Damping
Damping
Damping
resistor
resistor
resistor
User’s Manual U18953EJ5V0UD
EV
EV
DD
DD
EV
EV
DD
DD
EV
EV
DD
DD
EV
DD
(256 K words × 8 bit)
(256 K words × 8 bit)
(256 K words × 8 bit)
A0 to A17
I/O1 to I/O8
WE
OE
CE
A0 to A17
I/O1 to I/O8
WE
OE
CE
A0 to A17
I/O1 to I/O8
WE
OE
CE
SRAM
SRAM
SRAM
211
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