UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 809
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UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21.4.2 Restoration
address of the restored PC.
Execution is returned from software exception processing by the using RETI instruction.
When the RETI instruction is executed, the CPU performs the following processing and transfers control to the
<1> Loads the saved PC and PSW from EIPC and EIPSW, respectively, because the PSW.EP bit is 1.
<2> Transfers control back to the address of the restored PC and PSW.
The processing of the RETI instruction is shown below.
Note For details about the ISPR register, see 21.3.6 In-service priority register (ISPR).
Caution When the EP and NP bits are changed by the LDSR instruction during the software exception
Remark
PC
PSW
processing, in order to restore the PC and PSW correctly when returning by using the RETI
instruction, the EP bit must be set to 1 and the NP bit must be cleared to 0 using the LDSR
instruction immediately before the RETI instruction.
The solid line shows the CPU processing flow.
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
EIPC
EIPSW
Figure 21-10. RETI Instruction Processing
1
PC
PSW
Corresponding bit of ISPR
Return to original processing
User’s Manual U18953EJ5V0UD
RETI instruction
PSW.EP
PSW.NP
0
0
Note
EIPC
EIPSW
0
1
PC
PSW
FEPC
FEPSW
807
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