UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 937

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes 1. G1, G2, J12. G1, G2, J1
Remark GC: 100-pin plastic LQFP (fine pitch) (14 × 14) (
SI/R
SO/T
SCK
CLK
RESET_
OUT
FLMD0
FLMD1
HS
GND
RESET_IN Input
Pin Configuration of MINICUBE2 (QB-MINI2)
Signal
Name
X
D
X
D
2. A6, E5-E7, E11, F5-F7, G5-G7, L1, L5
GF: 100-pin plastic LQFP (14 × 20)
F1: 121-pin plastic FBGA (8 × 8)
Input
Output Pin to transmit
Output Clock output pin for 3-
Output Pin outputting clock
Output Pin outputting reset
Output Output pin to set
Output Output pin to set
Input
−
I/O
Pin to receive
commands and data
from V850ES/JG3-L
commands and data to
V850ES/JG3-L
wire serial
communication
signal to V850ES/JG3-L
signal to V850ES/JG3-L
V850ES/JG3-L to debug
mode or programming
mode
programming mode
Handshake signal for
CSI0 + HS
communication
Ground
Reset input pin on the target system
Pin Function
Table 31-3. Wiring Between V850ES/JG3-L and MINICUBE2
CHAPTER 31 ON-CHIP DEBUG FUNCTION
P41/SOB0
P40/SIB0
P42/SCKB0
Not needed
RESET
FLMD0
PDL5/FLMD1 76 78 A10 PDL5/FLMD1 76 78 A10 PDL5/FLMD1 76 78 A10
PCM0/WAIT
V
AV
EV
SS
Pin Name
User’s Manual U18953EJ5V0UD
SS
SS
With CSIB0-HS
GC GF F1
33,
23 25 K2 P911/SOB3
22 24 K1 P910/SIB3
24 26 L2 P912/SCKB3 55 57 G11 Not needed
14 16 H3 RESET
61 63 E9 PCM0/WAIT
11 13
69
−
8
2
μ
Pin No.
PD70F3737, 70F3738 only)
35,
10 F3 FLMD0
71
−
4 C1,
Note 1
Note 2
C2
−
Not needed
V
AV
EV
SS
Pin Name
SS
SS
With CSIB3-HS
GC GF F1
33,
54 56 H9 P30/TXDA0
53 55 H10 P31/RXDA0
14 16 H3 RESET
61 63 E9 Not needed
11 13
69
−
8
2
Pin No.
35,
10 F3 FLMD0
71
−
4 C1,
Note 1
Note 2
C2
−
Not needed
V
AV
EV
SS
Pin Name
SS
SS
With UARTA0
GC GF F1
33,
25 27 L3
26 28 K3
14 16 H3
11 13
69
−
−
8
−
2
Pin No.
35,
10 F3
71
−
−
−
4 C1,
935
Note 1
Note 2
C2
−
−
−